Wasga Compiler automatically partitions large designs onto multiple FPGAs while addressing chip resources, connectivity and the clock frequency constraints required for running software applications in near real time. It maximizes prototyping system performance and solves hardware/software validation bottlenecks of next generation SoCs to help meet the time-to-market challenges.

�Multi-FPGA platforms are heavily used for ASIC and SoC rapid prototyping. Existing tools notoriously fail the complex partitioning challenge. Verification engineers still rely on a cumbersome manual partitioning methodology,� expressed Hayder Mrabet, Flexras� CEO. �Wasga Compiler complements FPGA-based SoC prototyping with high performance automatic partitioning. Engineers benefit from high clock frequencies, fast execution time, and unlimited design capacity. Wasga Compiler just makes the multi-FPGA designer�s life easier.�