Product design constraints and optimisation01 Jan 2012 | Avinash Babu
Share this page with your friends
- PCB Real Estate
- Power Consumption
- Mechanical Form Factor
- Time to Market
- Vendor support, and
- Supply Chain Management.
Relevance to the customer and more significantly, the customer's customer is imperative.
Let us deliberate on some of the constraints listed above to get a better understanding of the problems faced and likely solutions.
Determined by the final look and feel of the product, 'real estate' is driven by the industrial/mechanical design of the product. Real Estate refers to the final usable area to place components on a PCB. For the kind of electronic design we need to realise for example, on a smart phone, the real estate available is low. This prompts a designer to choose smaller and smaller IC packages to realise the design. With smaller IC packages comes the complexity of assembly and more importantly, assembly rework of these components. Any day, a thin small-outline package (TSOP) or thin-shrink small-outline package (TSSOP) is easier to assemble on a PCB compared to a Quad-Flat No-leads (QFN) or Ball Grid Array (BGA). The PCB routing complexity also increases with complex packages. All these lead to cost escalation. The likely design compromises we make due to real estate are:
- Improper thermal isolation between the electronics
- Low ground isolation
- No place for protection circuitry for Electro Static Discharge, Electro Magnetic Induction, etc., and
- Improper signal net routing.
Most present-day designs are complex mixed-signal designs with analogue, digital and RF electronics on a single PCB. Regulatory authorities ask for certifications that need special electronics on board to qualify the product. Each constraint adds on to real estate requirements.
Some of the solution approaches are:
- Using smaller package ICs
- Increasing layer count of the PCB
- Using complex blind, buried and micro vias on the PCBs
- Building PCB stacks
The physical fitting of the assembled PCB into the product enclosure in itself puts a lot of constraints on the design. A product enclosure brings in height constraints and keep-out areas, which reduce the effective real estate available for component placement. Generally, the product enclosure makes the PCB outline uneven and this leads to a lot of wastage of raw material during PCB manufacture. The limited options for component placement reduce the effectiveness of the net routing on the PCB. This makes the component assembly very complicated and also requires extra handling area on the PCB; thus leading to additional cost. The only way to reduce complexity due to the product enclosure is to pre-empt the PCB layout phase with a product 3D modelling phase to learn of the constraints upfront. This will help to reduce the iterations within PCB layout.
The size of the PCB as compared to the size of the complete unit gives an idea about the challenge involved to fit the complete electronics within the PCB. In fact the complete functionality is realised through multiple small PCBs fit into the crevices.
This is driven sometimes by standards, but mostly by the use case of the product. Power optimisation, battery life extension and green initiatives are important requirements for customers. Hardware and software architectures of the product have to be specifically designed to accommodate power management. The idea is to enable only those parts of the system that need to be functional based on use cases of the product. There is always a compromise on the product features that a design can cater to due to the power budget constraint. As an example, speaker output wattage, type of wireless connectivity and type of LCD need to be constrained to extend the battery life of the product. Recognising the move towards lower power budget, silicon companies are moving towards lower micron technologies and fabricating chips that consume lesser power. But these come at a cost.
The choice of interface standards also can help optimise power consumption on a product. This is where the low power mobile DDR RAMs come into the picture. As compared to a normal DDR, a mobile DDR consumes lesser power. This is achieved by moving towards a 1.8V signalling as compared to the normal 2.5V signalling on the DDR. The lower operational voltages bring along with them tighter tolerances on signal integrity. As we move towards higher frequencies like 200MHz/266MHz, the constraints become more stringent. This requires more caution in the PCB layout and the electrical design, in other words, lead to cost increase.
In summary, some of the solution approaches suggested are,
- Power management implementation in software and hardware
- Moving to lower micron technology chips
- Operating at lower voltages
Time-to-market is another constraint that determines the choice of design approach. For example, most of the make or buy decisions are based on the time available for development, although capability is also a factor here. Time constraint in a design cycle, includes certain 'fixed time' artifacts and 'variable time' artifacts. The 'fixed time' artifacts, and in turn the dependencies on them, are inevitable and a deadly combination to counter especially if these 'fixed time' artifacts are outsourced. The designer has a leeway only on the 'variable time' artifacts. These too come at a cost. It is here that the designer makes a choice of where exactly does he bring value into the system.
For example, most of the circuit designs and open source firmware are available for free use today. The value addition brought in by the engineer is in using the reference design prudently to deliver quality product features. Most PCB design software today allows the 'auto-routing' option, which is much faster as compared to manual routing of the PCB. The quality of routing is inevitably better with manual routing. Should the routing be either one or a mix of both is the decision of the designer.
Embedded product development ecosystem nowadays, thanks to the open-source movement, provide a lot of support that help in reducing the time consumed by the design life cycle, which is something that is under control of the designer and are not like the manufacturing events that are process driven and fixed in time consumption and quality outcome.
Some of the activities that help in meeting the time constraints are,
- Using reference design as a base and customising them to the design requirements
- Many silicon vendors today provide support for design reviews which can be used to reduce a lot of testing time
- Silicon errata updates are available on the net, and we as designers should consistently keep updating ourselves regarding this to avoid unintended behaviour of the design during testing
- Design reuse and modular approach to design reduces re-inventing the wheel and in turn reduces risk and time to market.
Every product has an optimum price for market acceptance. Customers generally give a cost target to the designer. Everything in the product development should map to this target cost. The most important here is the recurring costs, which are mainly the product hardware costs. All the constraints listed in the above sections have cost implications.
Real Estate – To save real estate, we can move to smaller size chips. The cost of the chip and assembly offset the low size advantage. PCB sizes can be reduced by increasing the routing layers or reducing the routing thickness and clearance. But the PCB manufacturing houses that can handle this complexity are not many and then again, the costs are high for this premium service.
Power – To reduce power consumption, we could move to a lower micron technology chip or use a lower signalling level interface. These chips are by themselves costlier.
Time – "Time is money" or so the proverb goes and it is more relevant here than anywhere else. The hardware manufacturing technology can reduce the number of days for delivery but cost more. Evaluation software does not guarantee performance, which means more time spent on design and testing, while a tested, proven software module will cost more.
The entire ecosystem as such, is developed in such a way that low cost vendors do not guarantee quality and standards vendors who guarantee quality, charge premium. Cost control can be achieved by taking prudent steps while meeting the design constrain originating from real estate, power and time constraints and other factors not addressed here. It is only so much that someone can save through the design in itself.
The recurring cost of the hardware is also a number game, wherein commitment on higher quantity of purchase fetches a better deal. It is a matter of forecasting the requirement correctly, taking the risk of change and getting a better deal. The design team can also help by realising the design in and around the forecasted chips.
I would like to state a few product design challenges/failures, which illustrate the interplay of numerous product constraints. The purpose is to get a glimpse of the manifestations and the subtleties of the constraints. We need to look beyond the obvious and see how each constraint manifests when the design is taken through the life cycle. This is where a design house brings in true value into the system.
- A certain data recorder unit was a very complex design that was realised on a single PCB. The major driving factor here was the look and feel of the product. When we took this product to production, we faced a lot of issues. What we had failed to plan was what I call critical design mass to take it through manufacturing. The design was complex to be taken through manufacturing. The product designed should factor in the capability of the manufacturing eco-system, for effective productisation.
- We had designed a tablet for human care application. This was a feature rich product, and naturally the challenge was the power budget. We chose the right chips and put together the design, but when tested for the final application, the battery life was very low. Certain sections of the design also failed when run on a battery. We had to analyse the dynamism of charge flow from the battery under different use cases and manage the battery load to achieve the desired battery life and sustained product performance on battery.
- We had used an external camera sensor module while building an IP camera. This was done as we did not have the right expertise to develop a sensor module and not enough time to explore. This was the right decision given the time constraint and we had chosen a module that meets the cost and industrial design requirements. Here we faced a lot of issues with integration with our electronics due to lack of control of the external module. What helped us here was good vendor support.
The implications of the constraints are of second or third degree of abstraction. As designers, we need to have a high degree of foresight to really find the global optimum.
Let us quickly put down a few check points that might help prepare ourselves better to handle the constraints.
- What is the target price of the units?
- When is the unit expected to hit the market?
- Who are the target audience?
- What are the certifications required?
- Is there a 3D model of the industrial design?
- Prepare for forecasting the long lead purchase items
- Get a hold on the final test environment
- Pre-empt the product development group on these items.
Now that we have deliberated on some of the constraints, it is important to state that these are inevitable and appear in varying degrees on various product designs. On one end, we need to actively follow the technology curve and gain a strong ground for judgement and analysis. On the other side, we need to pre-empt and forecast the subtle manifestations of the constraints in a development cycle. We have addressed only a few of the many issues that arise during embedded product development; this is just the tip of the ice-berg. Product development is alluring for the very nature of dynamism involved and the numerous approaches that can be taken to resolve them. And I guess that is why we are all here!
About the Author
Avinash Babu is a senior architect with Mistral Solutions where he has designed CE products like handheld devices, network video recorders, wireless cameras, rapid product prototyping modules and multimedia platforms based on ARM and PowerPC architectures.
Want to more of this to be delivered to you for FREE?
Subscribe to EDN Asia alerts and receive the latest design ideas and product news in your inbox.
Got to make sure you're not a robot. Please enter the code displayed on the right.Please enter the valid code. Sorry, you have reached the maximum number of requests allowed. You may wish to try again after a few hours.
Time to activate your subscription - it's easy!
We have sent an activate request to your registerd e-email. Simply click on the link to activate your subscription.
We're doing this to protect your privacy and ensure you successfully receive your e-mail alerts.