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Cadence unveils verification IP for HDMI 2.0

10 Sep 2013

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Cadence Design Systems said it has made available its verification IP for the HDMI 2.0 specification. The VIP allows designers to confirm prior to mass production whether their systems-on-chip (SoCs) are in compliance with the HDMI 2.0 specification.

The company said the VIP works with all major logic simulators, verification languages, and methodologies, including the universal verification methodology (UVM). It can also support new high-definition video format that can allow for the development of next-generation TVs.

"The HDMI 2.0 verification IP provided by Cadence enabled a small verification team to deliver reliable results within very tight schedule constraints. By reducing the effort required to develop a verification solution, our engineers were able to focus on other tasks crucial to project completion," said Larry Porter, verification manager, Display Products Division STMicroelectronics.

"The introduction of the HDMI 2.0 Specification represents a major milestone for the HDMI Forum," said Robert Blanchard of Sony Corporation, president of the HDMI Forum. "Our members collaborated closely to take the highly successful HDMI Specification to the next level by expanding audio and video features for consumer electronics applications."

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