Cadence launches SD 4.0-compliant host controller IP core18 Sep 2013
Share this page with your friends
Cadence Design Systems has released its host controller intellectual property core compliant with SD Specification Version 4.0. The Secure Digital 4.0 IP block enables up to 312MB/s of memory card access performance for embedded and removable memory devices. It supports Default, High and Ultra-High Internet connections speeds equivalent to up to 3.12Gbit/s.
The Cadence SD 4.0 Host Controller IP core is designed for Ultra-High Speed Phase I (SDR12, SDR25, SDR50, SDR104, DDR50) as well as Ultra-High Speed Phase II (FD156 and HD312) modes, achieving connection speeds of 1.56Gbit/s and 3.12Gbit/s. To achieve optimal performance, an advanced scatter-gather direct memory access (DMA) engine is integrated into the IP core along with configurable ping-ping data buffers and a dual-buffer option. To achieve low-power operation, the SD 4.0 Host Controller IP core is architected to allow users to independently switch on and off the master SD card clock and the memory card clock, thus saving power.
Designed for ease of use and flexibility, the IP core has a standard AMBA AXI master interface for DMA operation and a separate AMBA AHB slave interface for CPU configuration. The SD 4.0 Host Controller IP core also supports standard Linux drivers for SD Host.
Want to more of this to be delivered to you for FREE?
Subscribe to EDN Asia alerts and receive the latest design ideas and product news in your inbox.
Got to make sure you're not a robot. Please enter the code displayed on the right.Please enter the valid code. Sorry, you have reached the maximum number of requests allowed. You may wish to try again after a few hours.
Time to activate your subscription - it's easy!
We have sent an activate request to your registerd e-email. Simply click on the link to activate your subscription.
We're doing this to protect your privacy and ensure you successfully receive your e-mail alerts.
X-ray shows how batteries can perform at high voltages
Researchers used X-ray imaging techniques combined with new data analysis algorithms to gain insights, at the nanoscale level, on the mechanical properties of a cathode material called an LNMO spinel.