Synopsys delivers IP Accelerated initiative04 Jun 2014
Share this page with your friends
Synopsys Inc. extended help to designers by reducing the time and effort of integrating IP into their SoCs through its IP Accelerated initiative.
This initiative augments Synopsys' broad portfolio of silicon-proven DesignWare IP with the addition of new IP Prototyping Kits, IP Virtual Development Kits, and customised IP sub-systems to accelerate prototyping, software development, and integration of IP into SoCs. With the IP Accelerated initiative, Synopsys goes beyond the traditional IP supplier paradigm, redefining what customers can expect from their IP providers to help them successfully integrate IP with less effort, lower risk, and faster time-to-market.
With the increasing SoC hardware and software complexity, developers need more from their IP providers to help meet their project schedules. Traditional IP blocks alone are no longer adequate to address the growing SoC design and integration challenges. Designers require solutions that ease IP configuration and integration into the overall SoC, as well as accelerate their software development effort. The Synopsys IP Accelerated initiative delivers solutions that address designers' pain points during IP implementation, software development, and IP integration.
DesignWare IP Prototyping Kits
The DesignWare IP Prototyping Kits centre around proven reference designs that enable designers to start implementing the IP in an SoC context in minutes. The IP Prototyping Kits provide the essential hardware and software elements needed to reduce IP prototyping and integration effort, including Synopsys' HAPS-DX FPGA-based prototyping system with pre-configured IP and SoC integration logic, a PHY daughter board, simulation testbench and a DesignWare ARC processor-based 32bit software development platform running Linux, reference drivers, and application examples.
Designers can modify the standard IP configuration for their target application through a fast iteration flow consisting of Synopsys' coreConsultant IP configuration tool, Synopsys' ProtoCompiler synthesis and debug tool, and compilation scripts.
DesignWare IP Virtual Development Kits
The DesignWare IP Virtual Development Kits are SDKs consisting of a reference virtual prototype, which includes a model of a multi-core ARM Cortex-A57 Versatile Express board and a configurable model of the DesignWare IP. The IP Virtual Development Kits run Linaro Linux and include reference drivers for the DesignWare IP, as well as provide non-intrusive debug control and visibility.
Software developers can use either the IP Virtual Development Kits or IP Prototyping Kits as a proven target for early software development, bring-up, debug and test concurrently with SoC development. Out-of-the-box support for a Linux software stack ensures that software developers are up and running instantly and can focus on the IP-specific software (e.g., drivers, bootcode, firmware).
Both the IP Virtual Development Kits and IP Prototyping Kits easily plug into existing software tool chains and interface seamlessly with the most popular embedded software debuggers, providing system-wide debug and analysis capabilities. The kits can be easily extended to represent the full SoC, enabling early and fast development of the entire board support package (BSP).
Customised IP sub-systems
With extensive knowledge in IP sub-system integration, Synopsys experts can assist designers in customising the DesignWare IP for their specific application requirements and integrating the IP into their SoC. Companies can leverage Synopsys' IP expertise to obtain pre-validated, fully integrated sub-systems, reducing the overall effort and cost to assemble and integrate the IP. Designers can then focus on differentiating their SoC rather than developing or integrating standards-based IP.
The DesignWare IP Prototyping Kits and IP Virtual Development Kits for select DesignWare IP are scheduled to be available in July.
Want to more of this to be delivered to you for FREE?
Subscribe to EDN Asia alerts and receive the latest design ideas and product news in your inbox.
Got to make sure you're not a robot. Please enter the code displayed on the right.Please enter the valid code. Sorry, you have reached the maximum number of requests allowed. You may wish to try again after a few hours.
Time to activate your subscription - it's easy!
We have sent an activate request to your registerd e-email. Simply click on the link to activate your subscription.
We're doing this to protect your privacy and ensure you successfully receive your e-mail alerts.
Berkeley Lab researchers create 2D hybrid perovskites
The large-area, square-shaped ultrathin sheets exhibit efficient photoluminescence, colour-tunability and a unique structural relaxation not found in covalent semiconductor sheets.