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"Greater use of IPs for design will favorably affect the industry"

( 01 Dec 2004 )
By Pradeep Chakraborty, India Correspondent



EDN Asia spoke with Walden C. Rhines, Chairman and CEO, Mentor Graphics Corpora-tion, during his recent trip to India. Rhines discussed the current state of EDA and semiconductor industries and gave his views on what lay ahead. Excerpts:

EDN Asia: How do you see the EDA industry evolving in India?

Rhines: The development part of EDA has already evolved a lot. Also, a lot of major companies are already present here. The other aspect is the amount of IC design work that is being done in India. We will continue to evolve in order to support the development groups that are maturing right now. Of the total tool engineering development workforce we have in the world, about 10 to 12 percent are based in India. We have over 300 people in India out of around 3,800 people globally.

EDN Asia: Do you think that greater use of IPs for design will adversely affect EDA industry?

Rhines: Greater use of IPs for design will favorably affect the industry. You can also embed IP in other designs. We sell IP as well as the tools to make IP. Our USB 2.0, PCI Bus, PCI Express, Gig E, Serial/Parallel ATA, etc are all standard building blocks.

EDN Asia: Are current EDA tools able to address design excursions into 90 and 65nm technologies?

Rhines: We can do twice the accuracy than anyone else in 65nm. Major problems have been overcome, for example, resolution accuracy. There were some challenges in power dissipation in 90nm that have been taken care of. In 65nm, you need to look
at innovative ways to get around power dissipation.

EDN Asia: You released the first concurrent chip-to-board solution for FPGA and PCB designs. How will this enhance system performance and lower costs?

Rhines: With this solution, people can route boards that won't rout any other way. It is going to be a key part of design teams' methodology. Besides, the FPGA folks need to communicate with the PCB folks. I am quite optimistic about our products.

EDN Asia: What are your plans for the next two quarters?

Rhines: We had a very good second quarter. We have held the year's outlook and set a forecast that we would grow 7 percent this year. This is faster than the industry's growth. And while there will be no recovery for EDA this year, our earnings is likely grow 30 percent. Next year we expect our earnings to grow 25 percent.

EDN Asia: How do you see the prospects for in-house EDA tools?

Rhines: I think the prospects are dismal. In the '80s and '90s, all of our tools were third party. We achieved economies of scale through specialization. We saved the electronics and semiconductor industries billions of dollars. However, there are still some special purpose things that a company needs. Hence, some companies create special tools or do modifications to our tools.

EDN Asia: With an increase in cost for design and implementation, is there a need to decrease EDA tool ownership costs?

Rhines: There is definitely a need to decrease design cost as the cost for an EDA tool is trivial. The total EDA industry is worth $3.5 billion, which is a very small percentage of the semicon industry's revenue. More than 90 percent of the cost is in people, prottypes, test wafers, design equipment, etc. So reducing EDA costs will have a minor effect. However, in areas where tools are a significant part of the expense, the way to cut costs would be to buy more EDA tools.


 
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