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Using an FPGA-powered reference design in automotive entertainment electronics

( 01 May 2007 )
By Joel Seely, Altera Corporation

Automotive entertainment electronics are driving a rapid evolution of features and capabilities that challenge designers with performance, cost, and flexibility tradeoffs. Unlike any other area of automotive electronics, multimedia graphics applications are highly visible with rapidly changing requirements and, in many cases, no set standards. Automotive designers need a solution that offers the utmost in flexibility and performance while also controlling costs. Programmable logic, specifically field programmable gate arrays (FPGAs), offers such a solution.

Historically, application specific integrated circuits (ASICs) represented the option-of-choice in semiconductors for automotive graphics applications because they offered manufacturers a cost-effective silicon solution. However, rising ASIC development costs, lower volume projects, faster time-to-market requirements, and increased complexity from features requirements may signal the end of the ASIC-dominated era in the automotive market segment. The top-tier automotive suppliers are looking for a cost-effective design platform that is both powerful and flexible to meet needs of their increasingly complex automotive digital systems.

Applications Specific Standard Products (ASSPs) are an alternative to ASICS in both Automotive and Consumer markets. The primary benefit to these products is their lower cost. However, there are hidden costs associated with ASSPs including finding an ASSP that has just the right mix of features, and if not having to augment it with external logic, software, or other ASICs or ASSPs. Furthermore, with rapidly changing requirements, ASSPs may not be available at the early stages of a design, or could go obsolete once a design is in production.

FPGAs offer a powerful, viable alternative to ASICs and ASSPs for automotive graphics applications because they significantly reduce engineering development time and the cost of multiple silicon iterations. Unlike ASSPs that may have needed features missing or ASICs that risk re-spins as designs change, or FPGAs can be programmed and reprogrammed as needed during the design process, enabling more rapid prototyping and fast time to market. They also can be upgraded in the field if requirements change—even after the devices are deployed in the vehicle. Without the up-front non-recurring engineering (NRE) costs and minimum order quantities associated with ASICs or the hidden costs associated with using ASSPs, FPGAs are a cost-effective choice for system design. Also, their ability to re-use a common hardware platform is important, allowing designers to create differentiated systems that support a variety of feature sets with one basic design, which results in reduced manufacturing costs.


FPGA Reference Design Powers Automotive Graphics

Infotainment applications require increasingly complex graphics processing capabilities. This processing can be implemented in high-end processors and DSPs, but at significant cost, complexity and power. An FPGA can be added to the system to lower the overall cost, complexity, and performance needs in a graphics system. Figure 1 shows a standard graphics reference design used to take video inputs and overlay on other images displayed on an LCD screen.

Figure 1: Automotive Graphics Control System using an FPGA and Host Processor

This reference design, featuring a video input module and LCD graphics controller implemented in an Altera Cyclone FPGA, shows the power and flexibility available in FPGAs for targeting low-cost applications such as those required by the automotive marketplace. The reference design runs on Altera’s Nios II embedded processor development board with add-on modules for the camera/video-input and output drivers to the display.

The video input module includes a front-end camera interface and IP for color-space conversion, sizing and scaling, and interface to video memory. The interface to the LCD display includes IP that controls alpha-blending between several layers as well as picture-in-picture capabilities. These input and output control blocks are part of an Altera SOPC Builder system which is used to seamlessly tie together all the IP blocks. A subset of the OpenGL-E graphics library runs on the host CPU. The library provides all functionality for handling and presentation of bitmaps, frame-buffer accesses and drawing of graphic primitives

An extremely powerful host CPU may be needed to implement the OpenGL graphics library, since extended graphics applications can be compute intensive when instituting rendering operations, rotations, line-draw and polygon operations, texturing and similar tasks, FPGAs can provide a solution as a coprocessor fabric, offloading the host CPU with algorithms that typically need the most CPU power.

Figure 2: Graphics Control System with Hardware Acceleration Coprocessor

Figure 2 shows an example of adding a graphics acceleration coprocessor to the reference design system. This coprocessor can take over many algorithms such as:
• Block Image Transfer (BLIT) operation such as direct blit, stretch blit, transparency, bilinear filtering, per pixel alpha, coloring, anti-aliasing
• Line draw with arbitrary width, round endpoints, truncated endpoints, alpha gradients, soft edges (blurring)
• Polygon draw of triangles and quadrangles, alpha gradients, soft edges (blurring
• Drawing circles, ellipses, and conic sections
• Creating quadratic and cubic Bézier

With the addition of the coprocessor, the CPU requirements of the host CPU are dramatically reduced. Of course more FPGA resources are used, but the system designer has freedom to choose which algorithms will be implemented in hardware and which will be implemented in software to optimize for the most critical system constraints (speed, power, cost, etc.).

We can take this offloading paradigm further and put the remaining processing tasks in the FPGA using a processor implemented on the FPGA. This has the added benefit of removing a component, the external host CPU, from the system. Figure 3 shows a diagram of the graphics reference design now using a Nios II processor in the FPGA to do the remaining software control tasks (such as anti-aliasing and OpenGL compliance).



Figure 3: Graphics Control System with Host CPU implemented in FPGA



Platform Concept – Many Smaller Variants
By using FPGAs in an automotive graphics system, the same platform can be used to address different market requirements. Figure 4 shows how starting with a single general-purpose platform many different variations can be made that meet different market requirements without having to re-spin an ASIC or create and debug new boards.


The variants of the automotive reference design described in this paper show how this concept works. A single working reference platform was used to implement several variations of a graphics controller module based on market needs. By using standard IP and reference designs, the development team can focus its efforts (and expense) on differentiating products from competitors and meeting customers needs instead of on basic programming. Furthermore, the use of FPGAs does not preclude implementing an ASIC later. The design implemented in an FPGA can be migrated to a structured ASIC such as Altera’s HardCopy device or a full custom ASIC because all basic IP is reusable for future device generations.

Conclusion
Under the hood, inside the passenger compartment, and in external diagnostic systems, FPGAs provide a flexible, low-risk path to successful system design—reducing manufacturing complexity and offering optimum cost efficiencies. FPGAs can be used as simple glue logic and as a bridge to interface various components—facilitating easy communication between standard components, microprocessors and system buses. They also can expand features and integrate core system functions to replace ASSPs and ASICs.

Although automotive applications often can justify the high volumes necessary for a profitable ASIC implementation, when increased complexity and time-to-market pressures are considered, FPGAs can meet or beat the overall project cost targets. The combination of this low-cost structure with abundant device resources available in FPGAs allows designers to implement complete, economical solutions ideal for this volume production application. Furthermore because of the flexibility of FPGAs, these designs can be modified and enhanced quickly to meet changing market requirements and create product differentiation without the costly redesign of the overall platform.
Click here for Figures:

Figure 1, Figure 2, Figure 3, Figure 4

 
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