The demand for higher efficiency in power conversion is becoming increasingly broader. The driving forces behind this demand are smaller form factors, higher levels of functionality and regulatory standards. With the demand so clearly articulated, the fulfillment is not necessarily straightforward. Changing technology landscape means there are many contenders at the topology and component levels. This article illustrates the right component and topology choices for a given application by comparing two high efficiency topologies.
Driving Forces
The power conversion industry is in the midst of a dramatic shift driven by the following:
· Energy regulation practices are becoming more widespread. These practices demand higher efficiency from power converters in all operating modes. Some examples include standby requirements of <0.5 W and efficiency requirements of >80% for many external power supplies required by California Energy Commission and also used by Energy Star in US.
· Harmonic reduction requirements are increasing the use of power factor correction (PFC) front-ends. The IEC 1000-3-2 is imposed by the EU and Japan and voluntarily implemented in many other countries.
· The power density requirements are going up because end consumers want more functionality in smaller packages.
· Shorter time to market requires a more modular approach to the power system design.
As each of the first 3 forces becomes stronger, the viability of traditional topologies to meet the system requirements diminishes. However, the design engineers are unable to take full advantage of the emerging approaches because of the dominance of the shorter time to market requirement. It is the role of the management to identify right architectures to invest in and allow the designers time to optimize those in order to improve the long term metrics. Also, it is the function of component suppliers such as ON Semiconductor to minimize the resources required for such transition by supplying the right components and design tools to the designers.
Application topology grid for off-line applications
When one talks about identifying the right topology, there is naturally no single answer for all applications. In terms of simplicity and widespread use, the flyback topology comes closest to being the universal topology. The choice of topology is primarily dictated by input voltage and output power and voltage. Factors such as efficiency, size, multiple outputs, and output regulation requirements are secondary determinants.
Figure 1 illustrates a generalized approach of identifying appropriate topologies for a given power level for off-line applications. On the horizontal axis, the power level ranges from few watts to over 1 kW. The bottom band is where the right application can be inserted for ease of association. The traditional topology band shows that the flyback is the choice for low power (upto ~150 W). After that, 1-switch forward converter becomes more viable, followed by half-bridge or 2-switch forward at higher power and finally a full-bridge topology at the highest power levels. This is conventional wisdom developed over decades of power industry evolution.
However, also shown in figure 1, the emerging topology band provides alternatives at each power level to the conventional approach which are more befitting choices to meet the emerging demands of higher efficiency and better power density. The reason these topologies are more appropriate lies in how they optimize the use of various power components such as FET switches, transformers, inductors, diodes, EMI filters and snubbers. Figure 1 lists the major power components required for each topology, but the component stresses and second order effects require closer attention.
Topologies for High Efficiency
Let us closely examine the two candidate emerging topologies shown in the mid-power range. These topologies are the active clamp forward converter and the LLC half-bridge (HB) resonant converter. Both these approaches have merits and will provide better efficiency compared to traditional topologies, but depending on the application requirements, one or the other may be more suitable. The simplified circuit diagrams of the active clamp and HB resonant topologies are shown in Figures 2 and 3 respectively.
The active clamp converter is an extension of a 1-switch forward converter and eases the system implementation due to following factors:
· Ability to handle wide input range without excessive stress on the MOSFETs
· Ability to operate over 50% duty cycle, thus increasing the turns ratio and leading to lower primary current stresses and lower secondary voltage stresses
· Reduction in switching losses by soft switching of the primary FETs
· Ease of driving synchronous rectifier FETs for improved efficiency
However, the design of the active clamp converter also presents some special challenges dealing with the following issues:
· Design and optimization of the clamp circuit components
· Choice of transformer parameters
· Accurate timing control of the main and the clamp switches
· Accurate control of the maximum duty cycle and UVLO
· Orderly start and shutdown
ON Semiconductor helps address these issues by providing an optimized PWM controller for active clamp circuits (NCP1562) and a comprehensive design tool that helps with complete design of the converter.
The HB resonant converter is a low component count topology in that it eliminates the need for output inductor as shown in Figure 3. Additionally, it provides following benefits:
· Lower voltage stress on primary switches
· Resonant operation to minimize the switching losses
· Ease of drive of high side switch due to non-variant duty cycle operation
However, the HB resonant topology also requires attention to following issues in order to optimize its performance.
· Selection and design of the resonant tank elements
· Selection of the appropriate operating frequency range
· Design of magnetics to handle wide frequency variations
With such complex design considerations, it is important that the designer has the right tools and application information available to design and optimized converter. ON Semiconductor offers such support material with its resonant controller NCP1395 for this application.
Comparisons
It is not possible to compare the two candidate topologies without providing some context of application. Hence, it is not feasible to answer the question “which topology is better?” without understanding the application requirements. As indicated above, the active clamp converter operates better over a wider input range. So, if the application is without PFC front-end or has longer hold-up time specification, it may make sense to consider the active clamp topology first. Similarly, if the load variation is large, the HB resonant converter runs into some limitations. However, with narrow input range and load range, the HB resonant converter becomes a better choice, especially for high output voltage applications.
Ultimately, the choice of topology falls back on the power supply designer based on factors such as design experience, component pricing/availability and allotted design time. It must be noted that the degree of complexity for these topologies is higher than the complexity involved in designing traditional topologies. As a result, many designers give up on the newer approaches after an initial attempt where they have not had time to optimize the design. However, with the right design aids, this task is becoming easier, and many designs have been put in production with these new topologies delivering improved results without incurring additional cost.
Summary
The availability of many components and topology choices for today’s designer allows them opportunity to make better trade-offs between the performance requirements and cost constraints. However, the plethora of choices also complicates the task of narrowing down the right solution for a given problem. It is important to understand the complete application requirements and the strengths/limitations of a given topology for that application before making the final decision.
Illustrations:
Figure 1Figure 2Figure 3
