Cypress Semiconductor Corporation's design subsidiary in Bangalore has designed a 16-Mbyte fast asynchronous SRAM with access time of less than 10 ns. With over 100 million transistors, and using 6-transistor memory cells, the device is a follow-on to the vendor’s 4-Mbyte fast asynchronous SRAMs. Cypress India was responsible for every stage of the design flow of the new SRAM, from concept to transfer for manufacturing. The first silicon of the part is already being characterized, and the first results suggest that the access time could be well under 10 ns, according to Badrinarayanan Kothandaraman, design engineering group leader. The design is implemented in 0.16 micron CMOS, and the size of the chip is over 120K square mils.
Although the company’s earlier fast asynchronous SRAM designs were high voltage implementations, with dual voltage transistors and dual gate oxide technology, the new SRAM uses only low voltage transistors with an eye to bringing down the cost of the chip. The device still tolerates high voltage, however, explains Badrinarayanan. In dual-gate oxide implementations, one portion of the chip is reserved for high voltage transistors, and circuits such as the regulatory circuits, power-on reset circuits, and input and output buffers are implemented using high voltage transistors, while in the new SRAM all transistors are low voltage. The designers have used a number of high voltage tolerance techniques, including cascoding the transistors, so that no transistor experiences a gate to source voltage more than 2.5V.
To ensure faster access time, a key design objective of the new SRAM was to ensure that the on-chip Vcc remains constant regardless of the external Vcc. “If the external Vcc of the chip is going from, say, 2.2 to 3.8V, internal to the chip it is only 2V,” says Badrinarayanan. “From 2.2V to 4V this chip will support the same access time.” The decision to make the SRAM in 0.16 micron CMOS also dictated the use of low voltage technology. “It is not possible to use high voltage technology at 0.16 micron, because you want to shrink down everything, and once you shrink down the gate oxide, you have to shrink down the supply voltage, so you need a regulator,” adds Badrinarayanan.
The new product line consists of four chips: 8, 16, 24, and 32 bits. The 8- and 16-bit chips come in a 54-pin TSOP-II package, while the 24- and 32-bit chips are in 119-bump BGA packaging. The SRAMs are priced between US$25 and $35 (1000), depending on speed, package, and data width.
Cypress Semiconductor Technology IndiaFax (91) 80-343 8679
www.cypress.com
