Brion Technologies has secured a new order for multiple Tachyon RDI lithography simulation and design inspection systems from Japan's Renesas Technology Corporation, one of the world's largest semiconductor suppliers. The chipmaker chose Brion's model-based, full-chip verification technology because it enables faster time-to-production for Renesas' 65nm process flows.
As device feature sizes shrink to 65nm and below, semiconductor manufacturers must have the ability to inspect and verify resolution enhancement technique/optical proximity correction (RET/OPC) designs before committing them to production. Tachyon RDI delivers the speed, model accuracy and ease of use Renesas requires to prevent killer defects while achieving its productivity goals.
"As we implement our 65nm process flows, we're finding that Brion's model-based, full-chip OPC verification platform offers a critical, enabling capability. In fact, we see major benefits in using Tachyon RDI as a sign-off tool before ordering photomasks to minimize the risk of costly yield hits due to defects," said Dr. Masao Nakaya, Executive General Manager of LSI Product Technology Unit at Renesas Technology Corp. "Tachyon RDI's performance and model accuracy gives us a production-worthy method of predicting these errors and preventing failures in LSI manufacturing."
"More and more, we're seeing device makers around the globe and especially in the Japan market make model-based OPC verification a sign-off requirement before designs are put into production," said Noriaki Kikuchi, president, Japan operations, Brion Technologies KK. "This is an important trend that underscores the significance of Tachyon technology, which delivers the acute accuracy required by the fast-growing OPC verification market."
Tachyon RDI is just one application supported by Brion's market-winning Tachyon system, a groundbreaking product that has seen rapid customer acceptance for its accurate and fast lithography modeling and verification capabilities. The success of the Tachyon platform has led to the introduction of OPC+, which extends Brion's OPC verification strengths to the critical OPC implementation market.
Dedicated to the demanding tasks of lithography modeling and design database handling, Tachyon represents a new and unprecedented approach to computational lithography simulation. Unlike conventional edge-based sampling methods, Tachyon uses a hybrid computational lithography architecture that combines image-based lithography process simulation and polygon-based design layout manipulation to simulate and inspect 100 percent of the chip area with exceptional accuracy. The Tachyon platform delivers ultra-fast throughput, accelerating time-to-result for chip manufacturers by enabling full-chip RET/OPC verification in a matter of hours.
Since the Tachyon platform first shipped in 2003, the platform has continued to gain steady adoption at chip companies around the globe. To date, thousands of production circuit layers have been processed by Tachyon systems worldwide.
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