Cadence Design Systems Inc., one of the leaders in global electronic-design innovation, and Advanced Semiconductor Engineering Inc., one of the world's largest semiconductor packaging and test company, today announced that ASE has selected Cadence System-in-Package (SiP) design technology to provide high-performance package design services to its customers throughout the world.
"With Cadence SiP design technology, we have an integrated co-design flow within the supply chain for optimizing SiP design and system integration, from die to package to final product," said Dr. C.P. Hung, senior director of corporate design, research and development, ASE Group. "By working with Cadence, we are better able to serve our customers' needs in this exciting and rapidly growing packaging segment."
The latest Cadence SiP design technologies provide flows for digital SiP module co-design integrated with the Cadence Encounter digital IC design platform, and flows for RF/AMS SiP module co-design integrated with the Cadence Virtuoso custom design platform. These flows integrate IC package and chip design into a concurrent streamlined process. This allows both ASE and its customers to shorten design cycle time and optimize total packaging solutions for yield and performance, while minimizing design risk.
"Collaborating with ASE has enabled Cadence to develop features uniquely designed for assembly and test foundries," said Charlie Giorgetti, corporate vice president of product marketing at Cadence. "This innovative partnership enables Cadence to offer SiP co-design solutions that reduce design cycle time and meet increasingly demanding performance specifications."
