Avago Technologies has announced it has proven 17 Gbps SerDes performance in 65nm CMOS technology. Continuing its legacy of embedded SerDes leadership, Avago’s current generation represents a reduction in power and area of up to 25 percent. With close to 45 million SerDes channels shipped, Avago has established a solid track record of delivering reliable, high-performance IP and now continues to push ASIC design limits by validating 17 Gbps SerDes in 65 nm.
The modular architecture and multi-rate capability of Avago’s SerDes core is highly scalable, and flexible power management options give system manufacturers the option to reduce power by up to 40%. Ideal for Ethernet switches/routers and storage switch applications, the embedded SerDes technology will support a broad range of standards, such as PCI-Express, Fibre Channel (1GFC – 16GFC), CX-4, XAUI/ CEI-6G, XFI and 802.3ap and is suitable for both chip-to-chip and backplane applications. Avago’s ASIC technology also provides an on-chip BERT for channel bit-error optimization and an on-chip high speed scope allowing system designers to view, in the time domain, the received signal internal to the chip.
”Avago’s history of being early to market with high performance SerDes IP continues with our demonstration of a 17 Gbps core,” said James Stewart, vice president of Avago Technologies’ ASIC products division. “With proven performance in 65nm silicon, we are positioned to meet the demands of our leading edge enterprise customers for ever-increasing density and speed.”
Avago Technologies incorporates testing capabilities as early as the definition of system-level architecture and accounts for in-circuit manufacturing test, functional test, system turn-on and debug, and field diagnostics. The result is faster time to market of reliable high-bandwidth networking and storage systems.
Avago Technologies
