Mediatek and Apache partner to address 65/45nm design challenges
(Business News, 20 Sep 2007 )
Apache Design Solutions, the technology leader in power signoff and complete silicon integrity platform solutions for system-on-chip (SoC), analog, and system designs, has announced that Mediatek, a leading fabless semiconductor company for wireless communications and digital media solutions, has selected Apache as their EDA partner for addressing 65 and 45nm physical design challenges. The Mediatek-Apache collaboration will focus on areas of power and noise, including power signoff, advanced low power and leakage optimization, reliability methodology, thermal integrity, and IC-package noise management.
Through the Mediatek-Apache partnership, Mediatek plans to establish power and noise signoff flows for their 65/45nm high performance and low power designs based on Apache's advanced technologies, as well as existing products such as RedHawk-EV, RedHawk-ALP, PsiWinder. Sahara-PTE, and Sentinel. In addition, Mediatek and Apache will share their expertise in methodology and signoff for system-on-chip (SoC) silicon integrity.
"At 65/45nm, we are seeing numerous designs with power and noise challenges, and forging a partnership with an EDA tools provider will enable us to manage and anticipate the upcoming needs," said MediaTek. "Our collaboration with Apache gives us access to market leading signoff technologies and in-depth technical expertise from a world-class R&D and support team, which will help us gain greater confidence in the success of our 65 and 45nm tapeouts."
"Mediatek is one of the leading fabless semiconductor companies and we are excited to partner with them in establishing signoff methodologies for their 65 and 45nm designs," said Dian Yang, general manager and vice president of product management of Apache. "We look forward to the technical collaboration with Mediatek and developing new solutions for our silicon integrity platform that meet their current and future needs."
