Altera and Synopsys collaborate to make Nios II processor core available for ASIC designs
(Business News, 15 Nov 2007 )
Altera Corp. 's Nios II processor core will be available for licensing through Synopsys Inc.’s DesignWare Star IP Program. Expanding on Altera’s existing FPGA and HardCopy structured ASIC product deployment options, this new offering enables Nios II users to migrate their designs to standard cell ASICs. The Nios II processor core is the most widely used FPGA-based processor, with more than 5,000 electronics manufacturers—including the world's top electronics OEMs—in the customer base.
The DesignWare Star IP program provides designers access to high-performance, high-value processor and DSP cores developed by leading Star IP providers. Utilizing its core competencies in design-for-reuse, intellectual property (IP) packaging methodologies and design flows, Synopsys will provide a configurable, fully synthesizable version of the Nios II processor core optimized for ASIC implementation. Designers will be able to use the core in the foundry and process technology of their choice. By combining this reusable core with Synopsys’ leading portfolio of tools, support, design services and additional key system-on-chip IP building blocks, Synopsys offers designers a robust solution for realizing their Nios II processor-based ASICs and ASSPs.
“As the Nios II processor core is the most widely used FPGA-based processor, we continue to see a growing demand from our customers to expand their silicon deployment options,” said Louie Leung, Marketing Director at Altera, Asia Pacific. “The partnering of our versatile Nios II processor core with Synopsys’ strengths in ASIC IP and design makes for a strong solution to meet our customers’ needs.”
“The collaboration between Altera and Synopsys to include the Nios II processor core in the DesignWare Star IP program extends availability of the core to a broad set of ASIC customers and applications,” said John Koeter, Senior Director of Marketing for IP and Services at Synopsys. “Designers can now take advantage of the Nios II configurability and scalability in their industry-standard ASIC design flow and turn to Synopsys as a single source for their ASIC IP, support and services needs.”
