The year ends on a happy note for the design industry. EDA revenue, which showed a lull for almost four years before it started growing again in 2006, has continued to be on the upward path, with a growth of 12 percent to reach an estimated $5.6 billion in 2007, according to Frost & Sullivan. Asia-Pacific share is estimated at 12.5%.
IC CAD HOTTEST AREA
The continuous EDA growth for the last two years has corroborated the designer stand that the lull was due to the EDA industry not keeping pace with their needs, especially at 65nm and 45nm, by failing to deliver appropriate tools. Especially problematic were DFM issues such as optical proximity correction and resolution enhancement technology. Now advanced IC CAD tools have come out capable of handling a wide variety of DFM problems. Not surprisingly IC CAD is now the hottest area for EDA spending. Gartner says that in 2007, as in 2006, EDA industry was primarily driven by IC CAD tools, which contributed significantly higher than CAE and PCB, the other two major application areas.
A trend setting current designs apart from earlier ones is the movement from RTL to ESL caused primarily by integration challenges in deep submicron necessitating designers to put on a single chip what previously were put on many chips. Even though design reuse and platform-based designs are increasing in popularity, Gartner estimates that 30 percent of the gates in the next-generation designs will still be specified and verified. Besides, computing-communications convergence is driving design toward algorithm-dominant applications such as video/image processing. The extreme complexities of these designs have pushed RTL to its limits, necessitating both ASIC and FPGA designers to move to higher levels of abstraction. Some problems have been reported in the transition from RTL to ESL, such as integration of software design at the system architecture and partitioning stages. However, such teething problems are bound to be there, and will be cleared as designers get more used to new models. The last two years have seen designers moving towards ESL design methodologies, especially those needing to perform architectural analysis with performance models.
EDA tool developers have targeted their efforts well towards ESL However, analysts warn against being complacent at the two-year steady EDA growth. While on the one hand designers do need EDA tool offerings compatible with the latest process geometries, on the other hand there is a persistent shift from licensing model to subscriptions, which has a detrimental effect on EDA growth. This shift is bound to grow as designs become more costly and designers have to resort to subscriptions to cut down design costs. Gartner forecasts falling EDA growth rate in 2008 across all three main applications.
LINUX MOVES AHEAD
Yet another growth story is that of Linux as a new OS for EDA applications. It has long been claimed that Linux offers great advantages for EDA software vis-à-vis other OSs, especially Windows NT. Also, Linux can integrate better into existing UNIX design environments as compared to other OSs, and is fast and reliable. However, designers were wary of using Linux mainly because of inexperience in its use. The last two years have seen Linux coming into its own. The low cost of Linux hardware and software, and its great computing performance and business software compatibility are making it attractive for designers as an alternative both to UNIX and Windows NT. Gartner estimates a robust Linux growth during the next three years at the cost of UNIX and NT OSs. Almost every EDA company is now offering chip design tools for the open-source OS. It remains to be seen whether Linux as EDA platform writes the epitaph for Windows NT and UNIX in chip design; many designers are convinced that it would do so.
