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Synplicity launches RadyIP program

(Product News, 22 Apr 2008 )
By Vinod Kataria

Bangalore: Synplicity Inc, a supplier of IC design and verification solutions, announced the ReadyIP Initiative—a program that takes aim at simplifying the access, evaluation, and use of intellectual property (IP) for FPGA-based system design. The ReadyIP program delivers the encrypted design methodology for FPGA implementation, allowing users to incorporate and integrate IP from several third-party vendors within their designs using the Synplify Pro and/or Synplify Premier solutions, Synplicity’s industry-standard synthesis environments.

It is said that the ReadyIP initiative comprises a number of key elements. These include standards-based IP encryption with rights management to facilitate easy evaluation of IP; the System Designer, a new technology-independent IP integration capability that is now part of Synplicity’s synthesis products ‘push-button’ Internet access to third-party IP directly from within Synplicity’s FPGA design environment; and the use of the SPIRIT Consortium’s IP–XACT IP packaging format to enable mix and match of IP from a variety of sources including the use of in-house IP.

Synplicity also announced that its ReadyIP initiative is being endorsed and supported by leading IP vendors. ARM, CAST, Gaisler Research and Tensilica are partnering with Synplicity as charter members in this new industry initiative. Selected secure IP from these vendors, that universally target multiple FPGA devices, will be available through this new program.

Andy Haines, senior vice president of marketing, Synplicity, said, “Synplicity’s ReadyIP Program is the first to facilitate the widespread availability of IP while allowing designers to easily ‘try before they buy’ third-party IP. As important, it allows a company to package its own IP and securely distribute it throughout an organization for design reuse and implementation using Synplicity’s ReadyIP design flow,” he added, “We are very pleased to welcome ARM, CAST, Gaisler Research, Synopsys and Tensilica into this program not only because they are key IP suppliers, but also as forward thinking companies supporting this major productivity advancement for the design community.”

Mary Olsson, chief analyst with Gary Smith EDA, state, “ReadyIP is a smart solution that gives users the flexibility to implement designs using various FPGA devices best suited to their particular applications. Moreover, users easily will be able to migrate their designs as new generations of technology emerge. By founding this vendor independent design flow on industry standards, and with great lead IP partners, Synplicity has really strengthened the value proposition of this new initiative.”

Graham Budd, EVP and general manager, processor division, ARM, explained, “Synplicity’s ReadyIP program is unique in that it offers FPGA designers easy and efficient access to the IP options available today, including the ARM Cortex-M1 processor. We believe ReadyIP will offer designers a better user experience and the ability to complete their designs more quickly and efficiently and deploy them on any FPGA they choose.”

The ReadyIP flow encompasses support for the SPIRIT Consortium’s IP-XACT industry standard specification for integration and configuration of IP, as well as support for Synplicity’s OpenIP encryption methodology that allows IP providers to securely deploy their IP to potential and existing customers. Synplicity has donated this encryption methodology to the IEEE and standardization is now officially in process through the IEEE P1735 Working Group.

Synplicity

 
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