TI announces industry’s first full production release of DDR3 register
(Top News, 02 May 2008 )
Texas Instruments has announced what’s said to be the industry’s first full production release of a phase locked loop (PLL) integrated DDR3 register for registered dual in-line memory modules (RDIMMs). This device enables system stability through constant clock and output delay over voltage and temperature variation. The single-chip quad rank support saves overall board space and reduces power consumption in servers, work stations and storage equipment.
The SN74SSQE32882 28-bit to 56-bit registered buffer operates at 1.5 V VDD and supports parity features to ensure reliability. It provides flexibility by supporting high data rates of 800 Mbps to 1,333 Mbps and can support up to 72 DRAMs on one module.
Other key features include the following:
· CKE power down · Control mode register · Output driver strength control · Operating frequency: 300 to 670 MHz
The SN74SSQE32882 exceeds the requirements for stability over temperature and voltage defined by Joint Electron Device Engineering Council. This ensures reliability in high-performance server systems.
DDR solutions ease design
TI’s DDR3 register adds to a complete portfolio of leading DDR2 registers and PLL devices such as the CDCUA877 and SN74SSTUB32866. In addition, the TPS51116 and TPS51100 DC/DC controllers significantly reduce the number of external components that support all the power management requirements for DDR systems.
