Bangalore: Texas Instruments Incorporated (TI) has introduced an evaluation module (EVM) that combines TI’s 14-bit analog-to-digital converters (ADCs) in an interleaved fashion with a Xilinx Virtex-5 FPGA. The FPGA comes pre-installed with SP devices’ proprietary time-interleaving technology to eliminate interleaving spurs, which enhances performance and facilitates rapid system-level evaluation for wireless communications, military, test and measurement applications. The EVM joins TI’s portfolio of support tools for customers using high-speed data converters in wide-bandwidth applications.
The ADS5474ADX-EVM incorporates two of TI’s ADS5474 ADCs, a Xilinx Virtex-5 FPGA and SP Devices’ proprietary time-interleaving technology to deliver an 800-MSPS ADC solution. The SP Devices’ software continuously monitors the system and removes ADC gain, clocking and temperature mismatches to reduce the interleaving spurs below the ADC harmonic spurs. By reducing the interleaving spurs, the software increases spurious free dynamic range (SFDR) from 45.78 dBc to 86.44 dBc for a 70-MHz input signal.
Jonas Nilsson, CEO of SP Devices, said, “Addressing the industry’s ever-increasing demand for higher sampling speeds and extended bandwidth is important to us. Combining SP Devices innovative interleaving technology with TI’s market-leading data converters allows us to extend performance boundaries of high-speed ADCs, which will enable exciting new applications including multi-carrier systems, software-defined radio, advanced imaging and beyond.”
Mark Stropoli, worldwide marketing manager for TI’s high speed products, stated, “With this latest EVM, customers can focus on prototyping advanced architectures to optimize system-level performance in these complex applications, rather than concentrating on developing an interleaving solution.”
Texas Instruments
