Xilinx is now shipping ISE Design Suite 11.1, an FPGA design solution with fully interoperable domain-specific design flows and tool configurations for logic, digital signal processing (DSP), embedded processing, and system-level design.
This latest release of the ISE Design Suite from Xilinx pioneers new ground for delivering sophisticated FPGA design technologies to a user community that is extraordinarily diverse with four domain-specific design configurations: the Logic Edition, DSP Edition, Embedded Edition, and System Edition. Each Edition provides a complete FPGA design flow tailored for the user profile (engineer persona) and domain-specific methodology and design environment requirements, enabling designers to focus their efforts on creating value-added, competitively differentiated product applications.
ISE Design Suite 11.1 also incorporates new features and ease-of-use enhancements to the base-level FPGA and domain-specific tools, technologies, and intellectual property (IP) components delivered with Xilinx targeted design platforms. Introduced by Xilinx with its new Virtex-6 and Spartan-6 FPGA families, targeted design platforms provide embedded, DSP, and hardware designers alike with access to a wide array of silicon devices supported by open standards, common design flows, IP, development tools, and run-time platforms. The ISE Design Suite 11.1 release shrinks development cycles up to 50 percent, reduces dynamic power consumption by 10 percent on average, and boosts tool performance by 2X for current generation Virtex-5 and Spartan-3 FPGA-based designs and enables early access customers to start designing with targeted design platforms based on the latest Virtex-6 and Spartan-6 devices.
Xilinx has also improved inter-tool communication throughout the entire design process, created seamless interoperability between all design configurations, and adopted EDA industry-standard FLEXnet licensing solutions to deliver breakthrough performance, power and cost advantages with the ISE Design Suite 11.1 release.
Embedded and DSP flows are more tightly integrated to ease implementation of embedded, DSP, IP and custom blocks into a single system. Each step within the design flow is optimized to facilitate more “turns per day” (design iterations) with new multi-threaded place and route capabilities, SmartXplorer and ExploreAhead support for distributed processing techniques, and second generation SmartGuide™ technology delivering 2X faster compile and incremental run times to accelerate timing closure. The ISE Design Suite 11.1 also features advanced power optimization algorithms and unparalleled design visibility with access to the full-featured PlanAhead Design and Analysis software for all Editions. Designers can more effectively evaluate, analyze, and optimize implementation results to achieve faster performance, greater device utilization, and higher design quality.
In addition, ISE Design Suite 11.1 users now have the added flexibility to tailor their installation and monitor usage. New floating licenses allow multiple users in multiple locations to access a single license in order to cost effectively support large or distributed design organizations and help reduce overall project costs. Alternatively, node-locked licenses provide the option for limiting usage to a single machine.
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