Fabless semiconductor company MediaTek Inc. has adopted Synopsys Inc.'s PrimeTime SI solution for static timing analysis (STA) and signal integrity (SI) signoff. MediaTek selected the Synopsys PrimeTime SI solution to streamline the signoff flow for its new cutting-edge system-on-chip (SoC) designs targeted at 65nm and below process technologies. In an effort to consolidate signoff tools at its global design centers, MediaTek did a thorough evaluation and selected the Synopsys PrimeTime SI solution because of its simple, widely deployable flow that delivered high performance and accuracy within 5 percent of HSPICE simulation.
PrimeTime SI extends the trusted PrimeTime STA and signoff environment to incorporate crosstalk delay and noise (glitch) analysis using the latest Composite Current Source (CCS) library models. PrimeTime is the leading timing signoff solution and is considered the de-facto standard for high-accuracy static timing analysis with the capacity and performance for 100+ million-instance chips being designed at 65nm and below. PrimeTime SI offers a unified approach of signal integrity and timing analysis that delivers a comprehensive and time-efficient method to concurrently analyze noise and crosstalk delay effects on timing. This approach delivers faster results than separate solutions while improving designer productivity by enabling quick debugging of complex timing and signal integrity problems in the same tool to speed design closure.
"Leading semiconductor companies see great value in having a trusted tool to perform both STA and SI signoff," said Antun Domic, Senior Vice President and General Manager, Synopsys Implementation Group. "PrimeTime SI offers a simple, unified, tapeout-proven signoff environment which helps significantly improve design efficiency and productivity."
Synopsys
