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Rambus Memory Innovations can Push DDR3 Data Rate Limits to 3.2Gbps

(Top News, 28 May 2009 )

Rambus Inc. has unveiled a set of innovations that can advance computing main memory beyond current DDR3 data rate limits to 3.2Gbps. These innovations, available for licensing, build on Rambus’ designs and include patented and patent pending technologies. Through this collection of innovations, designers can achieve higher memory data rates, higher effective throughput, better power efficiency and the increased capacity necessary for future computing applications.

“Product advancements in multi-core computing, virtualization and chip integration put ever-increasing demands on the memory sub-system, a key performance limiter in today’s performance computing systems,” said Craig Hampel, Rambus Fellow. “This collection of breakthrough innovations from Rambus allows for memory systems that are better suited for the bandwidth and workloads of these throughput-oriented multi-core processors, increasing the design and solution space for future main memory to enable a new generation of computing platforms.”

The Rambus key innovations to advance the main memory roadmap include:
FlexPhase Technology - introduced in the XDR memory architecture, can enable higher data rates compared to direct strobing technology used in DDR3;
Near Ground Signaling - supports high performance at greatly reduced IO power, allowing operation at 0.5V while still maintaining robust signal integrity;
FlexClocking Architecture - introduced in Rambus’ Mobile Memory Initiative, reduces clocking power by eliminating the need for a DLL or PLL on the DRAM;
Module Threading - increases memory efficiency and reduces DRAM core power, and when combined with Near Ground Signaling and FlexClocking technology, can cut total memory system power by over 40 percent;
Dynamic Point-to-Point (DPP) - provides a path for capacity upgrades without compromising performance through robust point-to-point signaling.

Details of these innovations and how they reduce limitations found in current memory solutions have been captured in a whitepaper, “Challenges and Solutions for Future Main Memory” that is available for download at www.rambus.com.

 
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