Enabling customers to make the right choice of platform

There are numerous considerations in the design of a “platform” intended for an embedded system. Although we refer to it as a “system-on-chip” (SoC), a platform represents one or more sub-systems in the complete system that a customer would build using the SoC platform. Typically, there are certain guidelines for selecting a platform for the target application:
• A microprocessor that offers a certain level of performance to support a real-time operating system
• A DSP that offers sufficient horsepower for multimedia applications
• A hardware accelerator for high-performance graphics or video
• Sufficient on-chip memory
• Interfaces for connecting external memory, since applications demand more space than what can be economically packed on-chip memory
• A sub-set of peripherals to support connectivity to external devices – USB, Ethernet, Bluetooth, Zigbee, and so on.

Since customers have varied requirements on performance and functionality, it is unlikely that a single platform SoC would meet the demands of multiple customers. The semiconductor vendors address this problem by introducing families of products that are targeted for different markets. If there are nP choices for the microprocessor architecture, nD choices for the DSP, nA choices for the accelerators, nM choices for memories, nI choices for the memory interfaces and nL choices for peripherals, then the number of possible platforms is given by the following equation:

Number of Platforms = n_P x n_D x n_A x n_M x n_I x n_L

There can be dozens of choices for any one of the IP cores. For example, there can be over 20 choices of the CPU based on the instruction set architecture and clock speed. Therefore the equation predicts a large number of platform “flavors” making it difficult for a customer to make a selection. The large state-space of platforms can be categorized in many ways – by end-market (e.g., Asian market, North American/European market, etc), by application (e.g., Video, Audio, Medical, Base-station, etc), by power requirement (e.g., Low-power, High-performance, etc.). This categorization can help define a roadmap for the platform SoC.

Platforms for embedded applications
In embedded applications, Texas Instruments offers a number of platforms:
• MSP430 series – This is intended for ultra low-power embedded applications where battery cannot be replaced frequently e.g. energy meters or medical implants
• C2000 series –This is intended for control applications such as automotive, industrial motor control, robotics, etc.
• C5000 series – These are low-power DSPs that are well suited for battery-operated applications such as hearing aids, mobile phones, etc.
• C6000 series – These are high-performance DSPs that are well suited for infrastructure applications, medical imaging, etc.
• DaVinci series – These are high-performance Video DSPs intended for security and surveillance applications, real-time video/image processing applications such as those in manufacturing
• OMAP series – These are Open Multimedia Application Platforms intended for low-power media applications with support for open-source applications

A platform selection tool
In each of these series, there are numerous devices that differ in terms of the IP cores that are integrated on-chip. For example, one version of MSP430 may support LCD screens whereas another version may support more than three timers and more than two UART interfaces. Texas Instruments provides selection guides to help the end-user in making an educated choice for the platform – for example, see the web-enabled tool available at: http://focus.ti.com/en/multimedia/flash/selection_tools/mcu/mcu.html (for MSP) and http://focus.ti.com/en/multimedia/flash/selection_tools/dsp/dsp.html (for application processors).

The tool permits the user to specify some top-level choices such as flash memory, the amount of on-chip RAM, the operating clock-speed, the number of CAN controllers, etc. A menu of 168 choices is displayed, to start with, in this tool. Since the end-user knows the functionality, performance, power, and cost requirements of the target application, he/she can prefer options, each selection helps narrow down the state-space of the platforms. If one opts for flash memory and at least two I2C interfaces, the number of choices comes down to 38. Opting for a minimum of five timers narrows down the choices further to 18. Specifying a minimum of 12 ADC channels will reduce the choices to 6. The tool offers only three choices when the user specifies the package area at this stage.

Texas Instruments provides online literature for helping the end-users make the right selection of the platform and software. Application engineers and marketing representatives help the customer in making the right choices.

System-level and SoC-level considerations
While it is important to optimize the performance of a platform SoC, systemic considerations are even more important from a customer’s perspective. A platform that ignores system-level performance may increase the system cost despite careful optimization efforts that may have gone into the SoC itself.

While carrying out the architectural design of a recently completed platform device, the design team had to ask several tough questions:
• Is a combination of an ARM Cortex-A8 and a high-speed DSP necessary for the market segment for which the device is targeted?
Knowledge of the end-user market was a key in making this decision. The device was aimed at applications such as personal audio players, Digital TV, IP Netcam and personal navigation systems where the ARM processor offers adequate performance. An on-chip Neon SIMD coprocessor, a graphics accelerator for 2D/3D graphics, and audio & video interfaces contributed to adequate speed performance.

• What peripherals must be included /excluded?
If the design team eliminated a key peripheral from the chip, the customer would have had to add it externally on the board, leading to a higher BOM and cost. Hence, the design team added some components to the chip so that the overall system cost will reduce. The inclusion of Double Data Rate (DDR2/3) memory interface, Ethernet Media Access Control (EMAC), and support for multiple operating voltages are examples of such decisions. Support for multiple voltages helps the customer eliminate expensive voltage converters.

• What should be the ball pitch of the package?
Increasing the ball pitch allows the customer to use low-cost two-layer boards.

• How can software development cost be reduced?
The ability to reuse software modules developed for earlier platforms also leads to cost reduction.

• How can power dissipation be reduced?
The design team made use of cell libraries optimized for reduction in dynamic and leakage power. The TI Smart Reflex-2 power management solution allows power optimization at all levels of design abstraction. Blocks are powered on a need basis to optimize power.

• What level of embedded system security should be provided?
Since the end-user may require a moderate level of security, on-chip hardware accelerators for tasks such as public-key cryptography were included. The security features of the ARM Cortex-A8 were also available to the user.

• How can test cost be reduced?
A number of DFT optimization techniques such as test compression permitted the team to use VLCT (Very Low Cost Tester) and multisite testing to bring down test cost.

About the authors
C.P. Ravikumar is Technical Director, University Relations, for Texas Instruments India University Program.

Vivek Sabnis is General Manager for DSPS Design India.