1st Asia Symposium on Quality Electronic Design Announces Final Program

The 1st Asia Symposium on Quality Electronic Design (ASQED09) has announced the final program, consisting of several keynote speeches by industry leaders and experts from Synopsys, NXP, Cadence Design Systems, University of Tokyo, and Verdant Electronics; tutorials; panel discussion; and over 80 technical presentations. This is the first ASQED event in Asia. It will be held on July 15-16, 2009 in Kuala Lumpur, Malaysia.

ASQED plays a critical role in promoting quality-based electronic design and manufacturing in Asia and plans to be an integral part of establishing a communication link between semiconductor disciplines such as design, design methodologies, manufacturing, test, and packaging.

“As the electronics world moves from individual subsystem ICs to systems-on-chip (SoCs), design verification is becoming a crucial factor in overall product quality,” said Dr. Charlie Huang, Senior Vice President and Chief Strategy Officer of Cadence Design Systems, and ASQED keynote speaker. “The ASQED conference provides an opportunity to highlight the growing need for advanced verification tools and methodologies so that engineers can ensure the quality of their designs and produce truly differentiated electronics products for the Asian market.”

The list of plenary keynoters offers a comprehensive perspective from design, process, and tool methodologies. Keynoters include:

A New World of Partnerships for 22nm and Below
Dr. Chi-Foon Chan, President and COO, Synopsys

The Present Status and Issues in Solar Photovoltaic Systems
Professor Takashi Tomita, Solar Quest, RCAST, the University of Tokyo

IC Packaging Technology - Electronic's New Gatekeeper for Cost and Performance
Mr. Joseph Fjelstad, Founder and President, Verdant Electronics

Trust But Verify – Product Quality in the SoC Era
Dr. Charlie Huang, SVP & Chief Strategy Officer, Cadence Design Systems

Variability-Resilient Mixed-Signal IC Design Methods
Dr. Hans Rijns, Vice President, head of Research, NXP Semiconductors, Netherlands

Tutorials
ASQED09 is pleased to offer the following tutorials by industry experts:

Tera-scale Computing and Interconnect Challenges – 3D Stacking Considerations
Dr. Tanay Karnik, Intel

Advanced Packaging Technologies and Future Interconnection Trends
Joseph Fjelstad, Verdant Electronics

Panel Discussion
Electronic Industry Trends and Implications for Asia
Moderated by Dr. Ali Iranmanesh, CEO & Chairman, Silicon Valley Technical Institute

Technical Sessions
ASQED09 technical session consists of over 80 papers by engineers and researchers worldwide, covering the following topics:
- Circuit & System Design
- Test & Verification
- IC Packaging Technology
- PCB and PWB Technology & Manufacturing
- Semiconductor Technology & Manufacturing
- Nano and Bio Electronics Innovations
- Photovoltaic Technology & Manufacturing
- Electronic Design Automation Methodologies

The papers will be presented in three parallel tracks on Wednesday July 15th and Thursday July 16th.

ISQED

ASQED09