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New design elements

( 01 Jul 2009 )
By Kirtimaya Varma, Editor-in-Chief, EDNA

Designers have been very successful in doubling the number of transistors on a chip in accordance with Moore’s Law since its inception in 1965. With the space between transistors reduced to the width of a few atoms, doubts were raised about Moore’s Law hitting the wall. But these doubts are coming to an end with new design ideas emerging. Though these ideas have hardly been implemented, designers are confident about their practicability that would push Moore’s Law further by a decade. Today designers are at 45nm. 32nm is already in pipeline with no problems foreseen except for power dissipation. 22nm, 14nm, and 10nm provide enough visibility for continuation of Moore’s Law.

THREE-DIMENSIONAL DESIGNS
The new ideas are based on designing beyond one-dimension. Today’s chips are flat. But we live in a 3-dimensional world. Why not use the three dimensions for extending designs from one dimension? Improvements in semiconductor materials, especially the possibility of making superconducting circuits that generate insignificantly small amount of heat, could make possible cubical chips to replace the present flat chips. Cubical chips will have thousands of layers of circuitry that combined with far smaller component geometries will improve chip computing power adequately to keep Moore’s Law going. Some other ideas—DNA, nanotube, crystalline, neural, and quantum—have lingered for some time and will impact Moore’s Law, but to what extent is not clear.

For over three decades designers were just concerned with the number of transistors on a chip while thinking of computing power. However, now they have also to think in terms of the number of cores, different kinds of chips, and spaces between the wires on a chip. With multi-cores becoming mainstream, virtualization is emerging as yet another design element they need to think of.

Even before the advent of multi-core chips, servers were heavily underutilized. Some data centers had servers running at as low as 5 percent of capacity, leading to wasting energy to run and cool them, and also money in real estate. The situation arose because of chip power increasing continuously. With multi-core, the situation aggravates. Yet another factor limiting capacity utilization is that most software applications cannot take advantage of all the cores. In desktops and notebooks the ability for software to use multi- cores is poorer than in servers. Thus, while the customer pays for the latest chips, which are now mostly multi-core, he is hardly able to make use of a significant amount of capacity he has paid for.

VIRTUALIZATION
Virtualization is emerging as the solution to this problem. Traditionally, the user runs one application on one core and the rest of the capacity idles. Through virtualization the user can run multiple applications on multiple operating systems on multiple cores using the same machine.

However, I feel a bit concerned about the plans of companies to design products with hundreds of cores and more. Intel is one such company. While making such products will be a great design feat, these will take us back to the situation where the user might only be able to use a capacity much less than he has paid for. For instance, with eight to ten core chips, virtualization increases the capacity utilization from 5 percent to 80 percent. But with hundreds of cores, the capacity designed will be so great that it is anyone’s guess how much of this could be used even with virtualization. Besides, not only in the PC space but also in the server and mainframe spaces many applications have been written in single thread. There does not seem to be any move to re-make them as multithreaded applications, thus again limiting the usage of multi-cores.

I believe we have now enough avenues to push ahead Moore’s Law, but designers must tread these carefully to get the best value for the customer.

 
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