Taiwan Semiconductor Manufacturing Co. Ltd (TSMC) will join the new industrial program IMAGINE, led by the French semiconductor research institute CEA-Leti, on maskless lithography for IC manufacturing. Intended to operate for three years, this program allows companies to assess a maskless lithography infrastructure for IC manufacturing and use MAPPER Technology as a solution towards high throughput. It covers a global approach, including tool assessment, patterning and process integration, data handling, prototyping and cost analysis.
“TSMC is always pushing for cost-effective lithography and the development of maskless lithography is one of the potential solutions. We have already announced the joint steps with Mapper to explore multiple e-beam lithography for IC manufacturing at 22 nanometer node and beyond,” said TSMC’s VP of R&D, Jack Sun. “By joining the IMAGINE program at CEA-Leti, we intend to federate the semiconductor industry around this technology and accelerate its development and introduction for IC manufacturing.”
“Lithography is a major challenge for the industry. A maskless approach can offer flexibility and gain in cost of ownership. Together with MAPPER, we see a route towards industrial throughput,” said Leti CEO Laurent Malier. “Having TSMC on board the IMAGINE program is pivotal and will strengthen the assessment towards manufacturing. It shows the commitment in the technology from the industry and will take maskless lithography to the next step in the development that is required to make it a viable solution for 22nm manufacturing.”
CEA-Leti
TSMC
RELATED ARTICLES
TSMC Enhances 0.13-micron Family
Synopsys and TSMC Deliver Accurate Lithography Verification for 28nm Designs
Strategies for Recovery
Gennum's Snowbush IP Group Delivers PCI Expess 3.0 PHY IP on TSMC 40nm Process
Intel, TSMC to Collaborate on Technology Platform, IP Infrastructure, SoC Solutions
IBM, CEA-Leti Partner on 22nm
