Texas Instruments has introduced a dual 14-bit, 250-Msample/sec ADC that combines high performance with low power consumption. The ADS62P49 achieves 73-dBFS (decibels relative to full-scale) SNR (signal-to-noise ratio) and 85-dBc (decibels referenced to the carrier) SFDR (spurious-free dynamic range) at an input frequency of 60 MHz. Chuck Sanna, product-marketing engineer for high-speed products at TI, calls the device the industry’s fastest dual 14-bit ADC, adding that it targets communications applications, defense imaging systems, and wideband and portable test-and-measurement equipment.
Power consumption is only 625 mW per channel, reducing thermal footprint and increasing system efficiency in high-density, multiantenna-base-station receivers and software-defined radios. Programmable gain and other user-selectable settings maximize design flexibility. Internal gain adjustment of as much as 6 dB in 1-dB steps allows customers to optimize SNR, SFDR, and input swing based on their applications’ needs. For instance, designers can maximize SNR to enhance linearization effectiveness in DPD (digital-predistortion) applications, or they can increase SFDR and reduce input drive to improve small-signal analysis in defense and radio-receiver applications.
The device forms a part of a complete signal chain; complementary products include the DAC5682Z and DAC5688 DACs, the THS4509 amplifier, the TRF3703 and TRF3761 RF components, the GC5325 DPD-transmitter processors, The CDCE72010 clock-distribution circuit, and the TMS320C6727B DSP. A comprehensive evaluation-tool suite speeds time to market. Customers can leverage TI’s TSW1200 digital-capture tool for rapid evaluation of LVDS (low-voltage-differential-signaling)-output ADCs with as much as 16-bit resolution and 500-Msample/sec rates to enable prototyping of complex systems and to further speed development time.
“Communications, defense, and test-design engineers are constantly challenged to create signal- and data-acquisition receivers with increasingly wide signal bandwidths that do not compromise overall system performance,” says Art George, senior vice president of TI's high-performance-analog-business unit. “TI addresses these challenges with the ADS62P49, which delivers high-performance, compact, power-efficient designs and enables rapid deployment of 3 and 4G [third- and fourth-generation] systems, software-defined radios, and spectrum analyzers.”
The ADS62P49 is available in a 9×9-mm QFN package for $144.75 (1000). The ADS62P49EVM evaluation module has on-board sockets for a voltage-controlled crystal oscillator, a crystal filter, and TI's newest high-performance clock-distribution and jitter-cleaning chip, the CDCE72010, which allows the module to function as a system-level evaluation kit and an ADC evaluation board.
Caption
At an input frequency of 185MHz, the ADS62P49 achieves a 79dBC SFDR, which extends to 91dBc if you exclude the second- and third-order harmonics.
