Bookmark and Share Printer-friendly version Email to a Friend

STARC and Cadence Collaborate to Develop Next-gen Analog/mixed-signal Reference Flow

(Business News, 20 Oct 2009 )

Cadence Design Systems Inc. will collaborate with STARC to develop the Japanese electronic design consortium's next-generation analog/mixed-signal reference flow. Cadence and STARC will use Cadence Virtuoso IC 6.1 technology as the platform for developing the STARCAD-AMS flow.

STARC is a consortium made up of 10 electronics companies, six of whom participate in the areas of analog and mixed-signal design. One of STARC's key roles is to validate and support the best design flow for client companies, and members stated that they selected Cadence for the flow project because Virtuoso IC 6.1 technology met STARC's strict criteria. STARC previously built its reference flow for digital designs on the Cadence Encounter Digital Implementation System. This new project represents STARC's first reference flow for analog/mixed-signal designs.

"We are excited to work with Cadence on our analog/mixed-signal reference flow," said Yoshio Okamura, Vice President of STARC's Development Department-2. "The members of STARC agreed that Cadence was the obvious choice for this collaboration, and we're anticipating results that will be just as helpful to our customers as the digital design flow we developed with Cadence."

The new reference flow will be introduced at client companies as STARC's standard design flow, delivering a comprehensive analog/mixed-signal environment and the potential for greater productivity and improved quality of results. Cadence will continuously provide STARC the best technology in the Virtuoso platform to help the consortium's client companies win in their highly competitive markets.

The new flow will support more advanced custom design techniques, including both schematic and constraint-driven layout and process variations to enable users to build more manufacturing-robust designs. These custom blocks can then be implemented and verified within larger SoCs.

Cadence


RELATED ARTICLES
Cadence Launches the EDA Industry's First Verification Solution for PCI Express 3.0

Early Power Analysis at Advanced Nodes

CAD Tool Interface Allows Altium Designer, OrCAD Users Specify Components from within Design Environment

Online Tools Home in on Analog Design

Integrated Chip Planning and Implementation Solution Improves Predictability, Reduces Risk of IC Designs

Cadence Introduces Innovative FPGA-PCB Co-Design Solution

Rethinking Chip Design Methodologies for Efficient Power Management

Simulator for Challenging Circuit Simulation Tasks

 
Printer-friendly version Email to a Friend
Article Rating 
Average Rate: No rating yet
 
Poor Quite Good Good Very Good Excellent
 
 
Related Content 
 
 
ADVERTISEMENT
 
 
ON-DEMAND WEBCASTS

 
Highest Rated  
 
 
 
 
ADVERTISEMENT
 
 


TECHNOLOGY NEWS
 
 
 
PRODUCT NEWS
 
FEATURED SPONSORS
 
 
 
DESIGN CENTERS
 
ADVERTISEMENT
 
     
CURRENT ISSUE
 
COVER STORY:

Analog design in the 21st century: challenges, tools, and IC advances

We are now more than a decade into the 21st century, and on an ever-accelerating fast track to technological innovation in electronics. The transistor and progression into the IC, or microchip, lit the fuse leading to the explosion of innovations in electronics that is now taking place. Since the wi ...
HIGHLIGHTS:
SPECIAL REPORT
DESIGN FEATURES
 
PULSE
 
 
 
 


 


RSS
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   

POLL
What type of environmental regulation do you think will be most beneficial for the tech industry?
Proper recycling and disposal
Push for power efficiency and energy conservation
Chemical/lead regulation
View results

 
 
 
 
 
 
Power Technology E-newsletter 
Power.org Releases Power Architecture 32-bit Application Binary Interface Supplement
EDNA, May 11
POL Regulators Designed for Energy-efficient Computing
EDNA, March 11
Fairchild Revolutionizes Power Savings
EDNA, January 11
Lattice Transforms Board Power and Digital Management
EDNA, November 10
 
Analog E-newsletter 
12V Dual-channel Synchronous Buck Converter Features Integrated FETs
EDNA, February 10
Power MOSFETs features reduced top-side thermal impedanc
EDNA, January 10
 

 
KNOWLEDGE CENTER
 
Texas Instruments: DaVinci™ Technology
 
Texas Instruments: Safe Bet Series
 
 
INDUSTRY LINKS
 
Photonics Association (Singapore)
Singapore Industrial Automation Association (SIAA)
Taiwan Semiconductor Industry Association (TSIA)
 
 
 
 
OUR SPONSORS
 







Keithley Instruments
With more than 60 years of measurement expertise, Keithley Instruments has become a world leader in advanced electrical test instruments and systems from DC to RF (radio frequency). Our products solve emerging measurement needs in production testing, process monitoring, product development, and research...
 
 
 
     
 

EDN India | EDN Taiwan | EDN Korea | EDN Japan | EDN China | EDN | EDN Europe

 
ABOUT EDN Asia | | CONTACT US
   
© 2012 EDN Asia All rights reserved.