Synopsys Inc. has created an optimized reference implementation methodology for the ARM Cortex-A8 processor that achieves greater than 2GHz (4,000 DMIPS) at 540mW. This result was accomplished by combining optimized methodology, tools and ARM Physical IP to enable new classes of mobile and tethered devices requiring the combination of high-performance and energy efficiency.
Synopsys and ARM have collaborated in a series of implementation case studies across methodologies, libraries and process technologies targeted at increased performance of a fully automated synthesizable ARM Cortex-A8 processor. To achieve optimized results, the Synopsys team used the Synopsys Galaxy Implementation Platform, including some of the latest 2009.06 Design Compiler Graphical, IC Compiler, StarRC and PrimeTime SI capabilities, ARM Physical IP libraries and memories for a 40nm foundry process together with highly tuned floorplan and design constraints. The ARM Cortex-A8 processor optimized implementation achieved greater than 2GHz in the typical corner on a 40nm process while consuming .24mW/MHz dynamic power and 57mW static power using less than 2 percent LVt cells.
The implementation team at Synopsys took advantage of the latest capabilities in the Galaxy Platform, including: library subset usage scenarios, delay performance versus cell area tradeoffs, cell placement density versus floorplan dimension tuning, leakage optimization techniques, multi-corner multi-mode (MCMM) optimization for better timing correlation and signoff optimization between IC Compiler and Prime Time, as well as the usage of the latest clock tree synthesis capabilities together with intelligent user clock constraints. The Galaxy Platform is a key component of Synopsys' Eclypse Low Power Solution and the Lynx Design System.
"Our collaboration with Synopsys will enable our licensees to achieve the kind of high-performance they need while preserving energy efficiency to be competitive in their marketplace," said Eric Schorn, VP Marketing, Processor Division, ARM. "This optimized reference implementation methodology combined with ARM Physical IP will enable our partners to introduce more compelling ARM processor-based mobile and consumer products."
Synopsys is continuing to apply this optimized methodology used on the ARM Cortex-A8 processor to additional ARM Cortex processors.
"The latest results of our collaboration with ARM enable designers to take maximum advantage of the Galaxy Implementation Platform on designs using leading-edge ARM Cortex processor cores and Physical IP," said Dr. Antun Domic, Senior Vice President and General Manager, Implementation group at Synopsys. "By making this methodology available through the Lynx Design System, we will help customers to achieve the lowest cost of design and fastest time-to-market for their next generation mobile SoC designs."
ARM DesignStart
Synopsys
RELATED ARTICLES
Synopsys Launches Synphony High Level Synthesis
Synopsys Enables First-pass Silicon Success for STMicroelectronics
Synopsys Sentaurus TCAD Used to Simulate Solar Cell Performance Characteristics at NREL
Indian Institute of Technology Kharagpur Receives Charles Babbage Grant from Synopsys
USB 3.0: A Simple Idea Full of Challenges
http://www.ednasia.com/article-24475-rockchipcollaborateswithsynopsysandcharteredtoachievefirstpasssiliconsuccess-Asia.html
