Next-generation serial busses continue to use cost-effective, legacy hardware for their transmission medium even in the face of higher bit rates. One consequence of this is InterSymbol Interference (ISI) and other signal impairments become more of a factor in limiting the achievable minimum bit error rate (BER). To counter this, 8Gbps PCI Express Gen3 and other protocols that encounter these physical limitations will need to support channel equalization at least to some degree. And likewise, a protocol analyzer hoping to analyze such a bus will also need to include equalization.
A protocol analyzer is in a unique situation compared to other instruments and the system under test (SUT). Its objective is to continuously, non-intrusively monitor the activity on a SUT’s bus and react to programmed events with triggers and/or trace storage qualifications. Since this is all must be done in real time, any equalization must be accomplished in real time. And, the protocol analyzer must make the measurement without disturbing the operation of the SUT and while tapping into the SUT’s signal path only at physically accessible points. These two conditions require the support of a suitable protocol analyzer probe.
The probe as a superreceiverThere are a variety of methods that a probe might employ to tap into a SUT. Since most serial busses, including PCI Express Gen3, are dual-simplex, they can be probed with a larger set of different probe types (Figure 1). Shown first is a repeater probe. It exploits the directionality of the bus to interpose an active repeating device between the input and output of the probe. It is, thus, expected that the repeater device produce a copy of the signal on the probe’s output and another to the protocol analyzer. Naturally, a pre-condition for the use of this type of probe is the provisioning to intercept the SUT’s bus at two points and insert the probe head in-between (in the correct direction, of course).
The repeating device can be either a digital repeater or an analog repeater. The latter can be thought of as a linear amplifier with sufficient linear gain so as to support a splitting of the signal into two different paths: the output path (where the net gain through the probe must be 0dB) and the protocol analyzer path. Thus, this type of repeater probe must take on the technical challenge of providing sufficiently accurate, non-distorted gain across sufficient signal bandwidth and versus the range of expected input signal swings.
The repeating device in a digital repeater probe receives the signal on its input and provides two digital copies: one to the output path and one to the protocol analyzer. In this sense, it’s similar to the analog repeater probe. However, because it’s receiving an analog signal on its input port and outputting two digital signals, it’s really acting more like a true bus receiver. Thus, it must support more of the behavior commensurate with a true bus receiver. For example, it must propagate the protocol’s sideband signaling, such as electrical Idle. And, it must participate in link training and equalization for the two new links: one on its input side and the other on its output. Thus, a digital repeater probe has much more opportunity to modify the operation of the SUT when it’s inserted (for better or worse). This is troublesome since a protocol analyzer is really supposed to observe the native behavior of the SUT.
Yet another type of probe is a snoop probe. The lower half of Figure 1 shows a form of a snoop probe with a resistive tapping element (although other types of passive tapping elements could be used). Obviously, this probe is direction-agnostic. But, the main benefit of this type of probe is that it leaves the SUT as close to its pristine state as possible. Also, the link only has to support one probe tap point (and its associated parasitics) and does not have to be intercepted. Naturally, such a probe is designed so as to minimize its parasitics at the single tap point. Figure 2 shows an example of this type of probe: the U4322A SoftTouch Probe for PCI Express 3.0.
The snoop probe delivers a small signal down the protocol analyzer path so as to minimize loading on the SUT. Thus, the primary technical challenge that the snoop probe has that the repeating probes don’t is the fact that its probe path has to accommodate a smaller received signal.
And, let’s not forget: all of these probe types, in PCI Express Gen3 and similar busses, have to support some level of programmable equalization in their probe path. Otherwise, they have no hopes of supporting successful bit capture. Thus, you can see that any probe path that meets the challenges described above can really be thought of as a SuperReceiver.
Equalization schemesPCI Express Gen3 specifies two different types of equalization: transmit-side and receiver-side. On the transmit-side, the SUT transmitter supports a programmable range of De-emphasis and Preshoot. Both of these are accomplished via a Finite Impulse Response (FIR) filter sitting in the transmitter. Depending on the values programmed into the FIR coefficients, varying amounts of De-emphasis and Preshoot will appear on the transmitter output.
De-emphasis was also employed in PCI Express Gen2. As you can see in Figure 3, De-emphasis involves transmitting the first changed bit in a sequence of bits at larger amplitude than the following identical bits. In this way, the transmitter anticipates being placed at the front of a long, lossy channel where edges will tend to get rolled-off significantly before they arrive at the receiver on the other end. Longer channels will tend to need larger amounts of De-emphasis. The amount of De-emphasis and other transmitter-side equalization is negotiated between the receiver and transmitter during a link equalization phase.
A transmitter using Preshoot over-emphasizes the swing on the bit interval before a changed bit. Like De-emphasis, this type of equalization tends to accentuate the signal’s edge before it is filtered by the lossy channel.
There are a variety of forms of equalization that can be employed in the receiver. One of these is Continuous Time Linear Equalization (CTLE), and it also is described in the PCI Express Gen3 spec. CTLE is simply a filter that emphasizes the incoming high frequency content over the lower frequency content. In this sense, it’s attempting to match the inverse of the frequency response of the channel (up to a certain frequency). Excessive compensation can result in as much ISI as too little. So, CTLE also must be programmed to an appropriate value during link equalization.
Other forms of receive-side equalization are discrete-time equalizers. One of these is Decision Feedback Equalization (DFE). Discrete-time equalizers are superior to continuous-time equalizers in their ability to attack crosstalk and deal with reflections, a discrete-time effect. DFE uses the decisions on prior bits to modify the interpretation of future bits. Specifically, an N-tap DFE will use weighted values of the prior N digital bits to sum into the decision threshold on the next bit. Thus, one drawback of DFE is that it’s susceptible to a burst of errors upon getting a single bit wrong. So, yet again, an appropriate set of DFE coefficients must be chosen during a link equalization phase.
Now, a probe must tap into a system and attempt to recover bits from the signal as it appears at the probe point (Figure 4). If the probe is tapping into the SUT’s signal path near its receiver, then it will likely need to support an equalization set similar to what’s supported by the receiver. In other words, it needs to support high frequency boost via CTLE with the possible addition of DFE to address discrete-time effects.
If the probe is tapping into the signal nearer the transmitter, then loss is not as much of an issue. Rather, it could be excessive residual transmitter-side equalization. And, there likely is un-attenuated reflection content. Remember that a point-to-point link, like PCI Express Gen3, only has to produce a reasonable signal at the receiver. At points in-between, there may be unsettled reflections due to the various discontinuities along the bus. A common reflection effect that you see at points ahead of the receiver is the reflection of a quasi-double-terminated bus. PCI Express Gen3 is a double-terminated bus. However, the spec allows for tolerances in the transmit-side and receive-side termination values. To the extent that these are mismatched, the probe will see a reflection step with a duration equal to the round trip time between the probe point and the receiver.
Finally, yet another equalization burden that a probe has to take on is the equalization of the signal impairments incurred in its egress path. A 60-inch probe cable, for example, will have a non-negligible amount of loss at 8Gbps. Thus, the probe path needs to compensate for this effect.
Equalization examplesFigure 5 shows an example of a signal at the probe tip when the probe point is near the receiver. The closed eye on the left represents an overlay of the worst case bit sequence without equalization. The open eye on the right is an overlay of the worst case bit sequence at the end of the protocol analyzer probe path after applying a programmed (but not necessarily optimal) amount of CTLE. Note this example includes the loss effects of the probe’s cable.
Figure 6 shows a second example. Here, the probe point is nearer the transmitter. Now, reflections dominate the signal impairments. When the probe is plugged into a position closer to either end of the link, those probed signals that correspond to the neighboring transmitter will have a signal that looks more like this example. The left eye is the worst case probe tip eye. Notice the excessive peaking. The right eye is what’s seen in the protocol analyzer probe path downstream of its programmable CTLE. Note that the CTLE curve used in this example is significantly different than the one from the prior example.
The eye shape differences are more subtle in this example. The probe tip eye has a larger amplitude variation. The result is more ISI which is best seen in the bathtub curves illustrate the eye width at the center of the eye versus target BER. This example also includes the loss effects of the probe’s cable.
Conclusion As you can see, the job of a protocol analyzer probe is not a simple one. Care must be taken to tap the signal from the SUT in the least-intrusive manner possible. And, then it must be conditioned properly to handle a disparate set of signal impairments. It is only after these two basic issues are sufficiently addressed by the probe, that the higher levels of protocol analysis measurement functionality can be attempted.
Author InformationGlenn Wood is a Research Scientist at Agilent Technologies where he specializes in Logic Analysis probing, Signal Integrity, and ASIC design. In these fields, he holds six patents. Wood received bachelor’s and master’s degrees in electrical engineering from The University of Texas at Austin and Carnegie Mellon University, respectively.
Captions
Figure 1: Probe types.
Figure 2: A snoop probe.
Figure 3: Transmit-side equalization.
Figure 4: Illustrative bus topology.
Figure 5: Lossy equalization example.
Figure 6: Reflection equalization example.
