Crosstalk penalty in serial-communication high-speed modules

The crosstalk between two channels is the ratio of the output of Channel A (with no input signal) divided by the output of Channel B (excited by the input signal). The crosstalk in decibels from B to A is defined as:



and would ideally be negative infinity in decibels for isolated channels (Reference 1). For bidirectional modules, Channel A would represent the output of the receiver preamplifier, and Channel B would be the output of the transmitter driver (Figure 1).

Crosstalk penalty is degradation in receiver sensitivity due to electromagnetic susceptibility to conducted and emitted transmitter radiation. Highspeed circuits make heavy use of dynamic circuits, which are particularly sensitive to noise at their inputs (Reference 2). Two types of crosstalk-induced errors, temporal and logic, exist. Temporal errors refer to delay aberrations due to crosstalk, and logic errors result from improper evaluation in dynamic circuits (Reference 3). This article focuses on crosstalkinduced logic errors, which designers quantify using the BER (bit-error ratio) of the received signal.



Crosstalk is inevitable within any enclosure that employs bidirectional transmission, but, if you employ good RF-design practices, you can substantially reduce the penalty from crosstalk noise. As technological advancements enable the availability of smaller and faster electronic devices, you must place increasing emphasis on designing for crosstalk isolation to maintain the high level of signal integrity that future communication systems will require.


Quantifying crosstalk
Direct measurement of crosstalk can be a daunting task. Circuit topologies, impedance levels, physical layout, and IC technology all play critical roles in crosstalk strength. Differential circuit topology is gaining popularity due to its increased crosstalk immunity and increased dynamic range versus groundreferenced (single-ended) circuits. However, due to a lack of accurate differential-measurement capability, crosstalk between two complex circuits may be difficult or even impossible to measure, simulate, or predict.

One method that overcomes this difficulty is direct measurement with a PMVNA (pure-mode vectornetwork analyzer), which measures the differential- and common-mode responses of a device in terms of mixed-mode scattering parameters. Accurately capturing mixed-mode S-parameters enables direct measurement of the RF crosstalk between differential circuits, even in cases in which the crosstalk exceeds the modeling capabilities of electromagnetic simulators (Reference 4). Although effective, this method requires expensive equipment and direct access to the circuits under test.

To amplify the visible effects of crosstalk, you can employ any of three methods: turning off the primary (monitored) signal, turning off the crosstalk source, or generating artificial crosstalk (Reference 5). You can turn off the primary signal by shortcircuiting its driver to ground with a short, low-inductance connection. Short-circuiting is critical, because noise coupled through mutual inductance disappears if you leave the driver open-circuited. Crosstalk should stand out clearly with the output driver turned off.

You can disable the crosstalk source either by cutting the interfering line or by shortcircuiting the aggressor driver; in either case, you must eliminate current draw. With the primary driver enabled, you can observe before and after waveforms; on digital scopes with math capability, waveform alignment and subtraction obtain the differential. You can induce artificial crosstalk by replacing the aggressor driver with a step function of known rise time; crosstalk is proportional to the induced dV/dt on the victim net. This procedure is a test you should use before populating the pc board with components, so that you can isolate and identify crosstalk sources.


An alternative: BER measurement
These experiments require either disassembly or partial destruction of the DUT (device under test), which can alter the environment surrounding the crosstalk conditions. Although these methods provide a means of identifying crosstalk sources, they do not provide what you need to know about crosstalk: its relative performance penalty. Good news: There is a better way. Using equipment that you usually find in a well-equipped communicationmodule- development lab, you can perform indirect measurement of crosstalk by measuring what really counts: the sensitivity penalty imposed on the receive data path due to crosstalk from the transmit data path.

The three real-life measurement examples that follow represent a cross-section of highspeed communication modules available today: a 2.5Gbps fiberoptic transceiver, a 10Gbps serialtransceiver chip, and a 10Gbps fiber-optic transponder. Although these examples do not cover every application, they may serve as a basis for measurement methods that you can easily apply to other modules.

Each example takes a similar approach. For modules operating strictly in the electrical domain, testing requires a precision reference clock, a serial-line-rate pattern generator, an electrical attenuator, a variable-phase-delay element, a CDR (clock-and-datarecovery) unit, and a serial BERT (bit-error-rate tester). At line rates of 2.5Gbps and beyond, it is likely that the modules contain optics. This fact requires additional hardware: an optical transmitter, optical attenuator, and optical power meter.

An MSA (multisource agreement), under which several manufacturers collaborate to guarantee interchangeability and interoperability, specifies the form and function of the 2.5Gbps fiber-optic serial transceiver. With a few line-rate and CDR modifications, its crosstalk-penalty measurement setup could find use in testing 155Mbps to 4.25Gbps transceivers that this MSA covers (Figure 2). You insert the pluggable DUT into a cage on a test board. In this example, the input to the device’s optical receiver is a 1310nm laser transmitter driven by a 2.488Gbps pattern generator.

The pattern, a PRBS (pseudorandom binary sequence), has a seed of 231—1, which creates a signal with a wide range of frequencies. The laser source routes to an adjustable optical attenuator with a power tap to measure the optical power to the DUT. The receiver path of the transceiver contains an APD (avalanche photodiode), which creates an output current proportional to incident optical power, a transimpedance amplifier to convert the current to an analog voltage, and a limiting amplifier to create a digital output from the analog voltage. The output is differential, in which the noninverting signal goes to a CDR unit that derives clock and data for the error detector.



The inverting output feeds a phase-delay element, which isessentially a coaxial tube (trombone) with a rotary dial that serves as a mechanical line stretcher. The variably delayed signal then routes to the input of the transceiver’s transmitter. You can adjust the phase relationship between transmitting signal and receiving signal to maximize or minimize the crosstalk penalty, as the relative difference in BER at the error detector shows.



Measuring the sensitivity of the transceiver’s receiver involves adjusting the optical attenuation in 0.5dB increments and measuring the resulting BER. For this example, sensitivity is the input level at which the BER is one error per 10 billion bits. Measuring the sensitivity penalty that crosstalk from the transmitter induces results in three sensitivity curves (Table 1 and Figure 3). For this device, the best sensitivity of -31dBm occurs when the transmitter is disabled. The bestcase crosstalk penalty of 0.3dB occurs with phase-aligned transmitter and receiver transitions. The worst-case penalty of 1.3dB occurs when the transmitting transitions are in the center of the receiving data eye—that is, when offset is 200psec for a 2.5Gbps signal with a 400psec bit period. You can see from these measurements that the phase relationship between the transmitting signal and the receiving signal is a significant factor in determining the worstcase crosstalk penalty.

10Gbps serial-transceiver IC
The next example measures the crosstalk penalty of a 10Gbps, bidirectional serial-transceiver chip with CDR functions in each direction for data retiming (Figure 4). A chip of this type finds use in copper or fiber-optic transceivers, at serial line rates of 9.95 to 11.1Gbps—for example, within XFP (10 Gigabit Small Form Factor Pluggable Module) MSAcompliant modules. The testing of this type of device is less complex than with the previously described fiber-optic transceiver, because, in this case, testing occurs entirely in the electrical domain.

A manually adjusted, electrically attenuated patterngenerator output into the receiverpath input of the DUT generates the serial-PRBS data stream. Onehalf of the differential output feeds to an external CDR unit, which performs CDR to drive the error detector. The other half of the differential receiver-path output routes through a manual delay element and back to the transmitter-path input. Transmitter termination with 50Ωloads stresses the transmitter driver, and the transmitter-to-receiver signal delay sweeps from 0- to 100psec—that is, one UI (unit interval) at 10Gbps.

The crosstalk penalty is the BER variation of the received signal over the 0- to 100psec delay sweep, with the input attenuated to keep the receiver in an error state— approximately 1E-6 BER, or one error per million bits. Although this BER range is not useful in real applications, it provides a good picture of the phase-related BER variation (Figure 5). This device experienced approximately two decades of swing in the BER at a nominal BER of 1E-7, or one error per 10 million bits. You can also quantify the crosstalk by the sensitivity difference at the minimum BER (with transmitter transitions aligned with the receiver transitions) versus the maximum BER (with transmitter transitions in the center of the receiver data eye). For this example, the sensitivity is determined as the input level at which BER is 1E-12, or one error per trillion bits.



The corresponding sensitivity penalty in this case was 1.2 dB in the electrical-voltage domain (Table 2 and Figure 6). With the transmitter disabled, this device had a measured receiver-input sensitivity of 13.5mV differential. At the worst-case phase difference between transmitting and receiving signals (0.5 UI, or 50psec), the sensitivity degrades to 15.5mV differential. This decreased sensitivity may at first glance seem insignificant, but if this device were assembled in an optical transceiver, an adverse impact on system performance might be the result. The optical-power-sensitivity penalty would be exactly one-half of the electrical-voltage-sensitivity penalty, or 0.6dB; the optical-link power budget would decrease by this amount. Another detrimental effect would be the premature and artificial trip of a loss-of-signal alarm, if the host module contained one, when the input signal was near the comparison threshold.





10Gbps fiber-optic transponder
The last and most complex example involves the crosstalkpenalty measurement of a 300-pin, 622Mbps_16- to 10Gbps serial fiber-optic transponder (Figure 7). Although these devices are not fully serial, they contain a serial transmitter and receiver pair for transmission over optical fiber. The transmitter and receiver optical engines, respectively, mate with a 16-to-1 multiplexer and a 1-to-16 demultiplexer. The setup is similar to that of the 2.5Gbps transceiver but with some notable exceptions: The line rate is 10Gbps, the data on the electrical-module interface is parallel at 1/16 the speed of the line rate, and the setup requires reference clocks for data recovery and retiming.

The data originates from a PRBS 231—1 pattern-generator signal at 9.95328Gbps (OC-192 SONET rate), driving a lab-standard 1550-nm laser transmitter. The optical data then goes to an optical attenuator with a calibrated power tap for monitoring the input level to the transponder under test. The receiver path of the transponder uses a reference clock to perform CDR; it then demultiplexes the serial data into 16 parallel channels. The parallel data electrically loops back with a parallel data clock to the transmitter-path multiplexer through an external multiplexer/ demultiplexer pair on the transponder evaluation board.

The reference clock for the transmitter, which retimes the data for serial transmission, is a delayed copy of the receiver-path recovered clock. A data FIFO enables the transmitter parallel clock and serial clock to be different. You can then manually adjust the phase relationship of the serial-transmit data to the serial-receive data for the crosstalk measurement. The BERT is driven directly from an external 16-to-1 multiplexer in the receiver path, allowing you to measure the BER of the receiver independently of the transmitter path while the receiver is experiencing crosstalk from the transmitter.



The resulting BER variation occurs as the serial-transmit-data delay sweeps from 0 to 100psec in relation to the serial-receiver data (Figure 8). The measurement was taken at both 25°C and an elevated temperature of 70°C, with similar results. The BER variation is approximately one-half decade at a BER of 1E-4, or one error per 10kbits. This BER variation translates to an approximately 0.3dB sensitivity penalty in the optical domain.

Author information
Keith Lystad is a high-frequency and fibercommunications field-applications engineer for Maxim Integrated Products, where he is responsible for customer support of the company’s optoelectronic and high-frequency signal-integrity/system-interconnect products. He holds a bachelor’s degree in electrical engineering from Virginia Polytechnic Institute and State University (Blacksburg) and a master’s degree in electrical engineering from Temple University (Philadelphia).

References
1. Rayas-Sanchez, JE, “A Frequency-Domain Approach to Interconnect Crosstalk Simulation and Minimization,” Department of Electronics, Systems, and Informatics, ITESO University, Tlaquepaque, Jalisco, Mexico.
2. Vittal, A, LH Chen, M Marek-Sadowska, K Wang, and S Yang, “Crosstalk in VLSI Interconnections,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 18, No. 12, pg 1817, December 1999.
3. Chou, H, and S Chiu, “Crosstalk Reduction and Tolerance in Deep Sub-Micron Interconnects,” Department of Electrical and Computer Engineering, University of Wisconsin, Madison, WI.
4. Bockelman, DE and WR Eisenstadt, “Direct Measurement of Crosstalk Between Integrated Differential Circuits,” IEEE Transactions on Microwave Theory and Techniques, Volume 48, No. 8, August 2000, pg 1410.
5. Johnson, H and M Graham, High-Speed Digital Design: A Handbook of Black Magic, Prentice Hall PTR: Upper Saddle River, NJ, 1993, pg 189.