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Kawasaki Adopts Apache's SoC Power Closure Design Flow

(Technology News, 21 Oct 2005 )

Apache Design Solutions, in physical power integrity solutions for system-on-chip (SoC) designs, announced that Kawasaki Microelectronics Inc. will use Apache's RedHawk full-chip power solution in the design flow for ASIC designs at 130nm and below. Kawasaki selected RedHawk for its analysis of the power/ground network behavior and its ability to identify the impact of noise on timing and yield.
Yoshito Muraishi, director of CAD Development of Kawasaki Microelectronics, stated, “As we move beyond 130nm process nodes, we need to support a design closure flow including dynamic power behavior prior to tapeout. After detailed evaluation, we selected Apache's RedHawk because we were able to detect the dynamic hot spots and utilize the accurate power supply noise waveforms for timing impact analysis."
Andrew Yang, CEO of Apache, said, “We are very pleased that Kawasaki joins our growing list of leading semiconductor companies worldwide in addressing the critical power closure requirements for advanced nanometer designs."
Apache Design Solutions
Kawasaki Microelectronics

 
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