What is the biggest challenge facing designers today, and how can Altera help designers overcome this challenge? A: The one factor that is fundamentally changing design strategies is the phenomenally rising design costs. Mask costs, verification costs, etc. are increasing exponentially, limiting the number of design starts. A large number of designers have found that moving away from ASICs to programmable logic greatly helps in reducing design costs. Altera helps designers in this movement towards programmable logic. More and more applications that were earlier using ASIC designs are now using FPGA designs.
How does Altera view the ASIC vs Structured ASIC vs FPGA scenario? A: All three of them have their own areas of effectiveness, though FPGA is gaining ground continuously. Applications wherein products are made in millions, such as cellphones and games, will continue to use ASICs. Applications wherein products are made in small numbers use FPGAs. Structured ASICs will be used in-between these two categories of applications.
What is the role played by the EDA industry in FPGA design? A: We ourselves produce the whole suite of tools, such as simulation tools, synthesis tools, floor planning tools, etc. for the FPGA designer. These tools are available through free downloads or at low price. There is no need for EDA companies to develop tools for programmable logic design. Besides, EDA companies have not invested in developing tools in this area. Altera has made huge investment in developing FPGA design tools. Half of our engineers are software engineers. We produce very robust tools even at the lower nodes. Today we have thousands of customers using our tools to design at 90nm node.
What are your plans for 65nm node? We would prefer not to announce this openly at this stage.
Many companies, including your competitors, have announced their plans for 65nm, and have said they will be introducing 65nm products soon. A: We have a different philosophy. We are not going to introduce 65nm products just for the sake of introducing them, or for the sake of being the first to come out with such products. When we feel that the design at this node has become robust,and the technology has matured, only then we shall make a chip at this node. Customers don’t ask for products at any particular node. What they look for in a product are performance, cost and features. We can satisfy demands of our customers at 130 and 90nm.
Will Altera not be left behind in technology at 65nm node? A: There is no question of Altera being left behind. We have 75 engineers working on new technologies. We were not the first to come out with 90nm products, yet we are leaders at 90nm. Our 90nm yield is much ahead of competition. So we are operating at higher margins than competition. Our foundry TSMC has announced that Altera is ahead by nine months among 90nm players.
TSMC has been criticized for low yield at 90nm. NVIDIA, which was using TSMC as foundry, left TSMC reportedly complaining poor yield and missing deadlines. A: The processes used by TSMC for making our kind of chips are state-of-the-art.
A competitor claims that it is the leader in 90nm FPGA. A: At high-end FPGA, we are the leader. In the entire PLD market, the competitor has a larger share. However, we will continue to grow at 20 percent growth rate, to take the largest share in the PLD market.
We are now more than a decade into the 21st century, and on an ever-accelerating fast track to technological innovation in electronics. The transistor and progression into the IC, or microchip, lit the fuse leading to the explosion of innovations in electronics that is now taking place. Since the wi ...
Keithley Instruments
With more than 60 years of measurement expertise, Keithley Instruments has become a world leader in advanced electrical test instruments and systems from DC to RF (radio frequency). Our products solve emerging measurement needs in production testing, process monitoring, product development, and research...
