Each year, EDN’s Innovation Awards honor outstanding engineering professionals and products. Our Innovator of the Year award recognizes an electronics engineer or engineering team for innovation in product design or technical leadership. The Innovation of the Year awards recognize unique, state-of-the-art electronics products in several categories. This year was no different. The ballots are in, your peers have spoken, and the winners have been revealed.
As usual, the festivities took place in conjunction with the Embedded Systems Conference in San Jose, CA, on April 3. The gala featured a keynote address by August Capital venture capitalist Andy Rappaport, a gourmet menu, and, of course, the opening of the envelopes and unveiling of the winners. To top it all off, EDN will donate a portion of the proceeds from the nominations and the awards event to the engineering college or university of the Innovator of the Year’s choice. Turn the page to see who took the honors, and please join us in congratulating this year’s winners.
EinsTimer statistical timing development team, IBM Research
Corner-based timing is painting IC designers into a corner, but the IBM Research EinsTimer team crafted a potential means of escape. Thetraditional static approach to ASIC timing closure, based on “corner” or “case” files, focuses on designing for worst-case scenarios. This pessimistic method leaves much-needed performance on the table. Worse, static tools are proving unable to comprehend the random—and potentially show stopping—process variations that are becoming more numerous and severe as geometries shrink.
With EinsTimer statistical timing tool, a parameterized, block-based statistical timer, the IBM team proved that statistical timing can be both accurate enough and fast enough for multimillion-gate designs. To do so, the team had to take on and surmount challenges including variational gate and wire modeling, statistical calculations, correlations, software architecture, and incremental timing. The resulting tool reduces pessimism, provides efficient process coverage, and demonstrates the viability of concepts that will become even more important as the design process itself becomes more probabilistic.
ANALOG ICs VIP50 process and products, National Semiconductor
A brand new process was the first step in National Semiconductor’s development of six new precision op amps that offer as much as 90% power savings over comparable devices. The VIP50 SOI (silicon-on-insulator) BiCMOS process combines highly-efficient bipolar transistors, analog-grade MOS transistors, highly matched, low-temperature-coefficient thin film resistors, and laser-trim capability. The process dramatically improves the performance of the company’s next-generation precision and low-power, low voltage op amps.
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ASSPS AND SOCs DIB7000-H DVB-H receiver, DiBcom
British research firm Vision gain predicts that the DTV handset market will grow to more then 105 million units worldwide by 2009. In preparation for that popularity boom, DiBcom developed its DIB7000-H chip set, which allows consumers to watch live digital terrestrial television anywhere—on their cellphones, in their cars, and even on their PDAs. The DIB7000-H is capable of demodulating both DVB-H and DVB-T broadcast signals, and it can process a 24Mbps digital signal in an error free manner even when the receiver is traveling at 150mph. The chip set incorporates a circuit block for IF (intermediate frequency) and baseband inputs, enabling its interface to very-low power RF tuners.
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COMMUNICATION ICs AGN300 802.11 a/b/g True MIMO chip set, Airgo Networks
The Holy Grail of the connected home remains a “no new-wires” way to move rich data streams. Airgo Networks claims that its newest chip set provides the speed and reliability necessary to enable the distribution of content—such as media-rich Internet, large files, video, IPTV service, music, photos, and games—across a wireless network without compromises in performance while remaining 100% compatible with 802.11b, 11g and 11a WiFi.
Offering connection speeds that are purported to be faster than 10/100 Ethernet, the chip set eliminates the need for unsightly and inflexible wired connections between devices in the home, such as routers, laptops, PCs, set-top boxes, game consoles, and TVs. In addition, Airgo’s third-generation technology makes the wire-free office a reality.
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DIGITAL ICs AND PROGRAMMABLE LOGIC Fusion mixed-signal FPGA, Actel
Fusion combines mixed-signal analog capabilities with large amounts of flash memory and an FPGA fabric. The Fusion PSC (programmable system chip) brings the benefits of FPGAs to applications that historically have been served by discrete analog component and mixed-signal-ASIC suppliers.
The technology takes advantage of a high-isolation, triple well process, along with Actel’s ability to support high-voltage transistors. Fusion peripherals include hard analog IP (intellectual property) and both hard and soft digital IP, such as Actel’s CoreMP7 and 8051-based microcontroller cores. Cores communicate across the FPGA fabric via a layer of soft gates called the Actel Fusion Smart Backbone. More than a bus interface, the backbone integrates a microsequencer, within the FPGA fabric, that configures the individual peripherals and supports low-level processing of peripheral data.
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DIGITAL SOC INTELLECTUAL PROPERTY Dynamic point-to-point technology, Rambus
One of the most frustrating roadblocks today’s engineers face is balancing the necessary trade-offs between memory performance for capacity and expandability. Rambus’ DPP (dynamic point-to-point) technology is designed to eradicate performance deficiencies inherent in previous approaches.
The DPP inventors anticipated the future direction of the market and implemented high-speed, differential signaling. DPP technology allows designers to maximize memory capacity without compromising the signal integrity benefits of point-to-point signaling. DPP technology allows PCs or home servers to utilize a single memory module at full bandwidth but with an option for a second module upgrade on a fixed datapath. This feature enables eight times greater memory bandwidth than previous technologies for consumer, multimedia, and computing systems—and still supporting traditional modules and new application form factors.
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EDA (DESIGN AND IMPLEMENTATION) EinsTimer statistical-timing tool, IBM Research
After winning accolades and finally the best paper award at the 2004 DAC (Design Automation Conference) for advancements in statistical-timing-analysis research, IBM Research made its EinsTimer statistical timing tool commercially available in 2005. The tool gives a truer account of circuit performance than static tools, which corner files drive. These corner files sometimes provide pessimistic design scenarios. The EinsTimer statistical timing tool seemingly debunks the long-held myth that accurate statistical analysis of multimillion gate designs is computationally intractable. For more details, see “IBM makes EDA play, offers commercial statistical timing tool” at www.edn.com/article/CA605769.
Introduced in June 2005, Gradient Design Automation’s FireBolt IC thermal analysis is unique in that it addresses thermal analysis from an IC-design perspective rather than a packaging or systems perspective. Heat worsens transistor leakage, so by gaining a better understanding of on-chip thermal issues, users can better check their designs and thus see how their overall systems conform to low-power requirements. For details see “EDA start-up targets IC thermal hot spots” at www.edn.com/article/CA607747.
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EMBEDDED SYSTEMS XPort AR embedded-processor module, Lantronix
The Lantronix XPort AR is the first embedded device server that goes beyond simple network connectivity to provide manufacturers with intelligence at the network edge by incorporating standards-compliant information transport and security protocols. The XPort AR module includes a complete embedded computer and an Ethernet 10/100 interface, along with an onboard network operating system and Web server in an RJ45 package about the size of two sugar cubes. You can use the fully integrated XPort AR as a device’s CPU, allowing developers to add their own device-specific intelligence through an API (application programming interface). The POE (power-over-Ethernet) pass-through feature eliminates the need for power cables to the device, making the XPort AR the first fully IEEE POE standards-compliant embedded device-server module.
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POWER ICs STw4141 dc/dc converter IC, STMicroelectronics
STMicroelectronics’ STw4141 dc/dc converter allows, for the first time, two different output voltages to be generated using a single external coil, thereby allowing parts-count reduction in both pc-board area and manufacturing cost in applications that require two separate power rails. The device was specifically designed to supply digital baseband and multimedia processors in portable applications such as mobile phones, digital still cameras, and PDAs, where designers operate under tight pcboard area, cost, and powerconsumption constraints.
Typically, processors used in these applications require separate supplies for the core, which can run on voltages as low as 0.9V in new designs, and the I/O circuitry. Current practice is to use two standard step-down dc/dc converters, each of which requires a coil, two or more external capacitors, and, in some cases, external resistors to set the output voltage. All dc/dc converters require an external coil, which significantly impacts the bill of materials (BOM) and the application cost. With its singlecoil/dual-output architecture, the STw4141 cuts the BOM by up to 40% and reduces pc-board size by 30%, compared with previous standard-supply approaches. For example, you can implement a complete STw4141 design using only 56 mm2 of pc-board area, compared with approximately 80mm2 for the best alternative approaches.
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POWER SYSTEMS AND MODULES LTM4600 high-power dc/dc micromodule, Linear Technology
Linear Technology’s LTM4600 is the first high-power dc/dc module that meets the spacing and assembly requirements of densely populated boards such as advanced embedded systems. This encapsulated µModule dc/dc power supply is housed in a 15 15 2.8mm LGA package. This complete power supply is smaller than most FPGAs and processors. Because it has only a 2.8mm profile, you can place the LTM4600 on the backside of a board without adding significant thickness to the end product.
The µModule is rated for 20 and 28V input operation. The output voltage is adjustable with a single resistor from 0.6 to 5V. The device can deliver up to 10A of output current and offers fast transient response to fast-changing load current transients.
Cradle Technologies’ CT3600 multicore devices comprise two compute quads that symmetrically organize a total of eight to 16 digital signal processors with four to eight general-purpose processors targeting multimedia applications.
To support high data throughput for the multiple cores, the CT3600 architecture employs a three-tier memory hierarchy, a wide and flexible DDR SDRAM interface, a 64-bit internal global bus, and several dedicated I/O and DRAM DMA engines. The smart I/O subsystem comprises as many as 18 pin-groups of eight pins each, which a PLA block and a series of FIFOs support. Each pin-group is fully programmable for data, control, or a combination of the two.
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SENSORS AND COMPONENTS ADNS-6010 laser-based optical-mouse sensor, Avago Technologies
PC gamers demand the highest accuracy and most responsive tracking from their input devices. A fraction of a second’s delay in response or a minor inaccuracy in position could mean the difference between victory and defeat.
To help address this need, Avago Technologies developed a high-performance, laser-based optical mouse sensor designed primarily for gaming mice. The sensor allows manufacturers to offer mice that are ideal for the unique requirements of today’s highest-performance PC games. For popular FPS (first-person-shooter) games, the user wants extreme efficiency in hand movement and cursor responsiveness. Progamers use special surfaces such as metal and slick plastic to assist their hand movements.
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SOFTWARE LabVIEW 8, National Instruments
LabVIEW 8 is an upgrade to National Instruments’ LabVIEW graphical-development platform. The tool offers distributed intelligence and a suite of new capabilities that allow engineers and scientists to easily design, distribute, and synchronize intelligent devices and systems. The software features a new project based environment for developing and managing large-scale applications, as well as the latest in Express technology for simplified instrument control.
Together with significant updates to the LabVIEW real-time module, LabVIEW FPGA Module, LabVIEW PDA Module, and Lab-VIEW data-logging and supervisory control module, LabVIEW 8 presents a simplified, scalable interface for communicating with and synchronizing remote intelligent devices and systems, such as real-time processors and FPGAs.
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TEST AND MEASUREMENT (APPLICATION SPECIFIC) N4903A high-performance serial BERT with jitter-tolerance testing, Agilent Technologies
The next generation of gigabitc serial-bus standards is approaching. Data rates of 5Gbps and beyond will cause signal-integrity and jitter issues during design and characterization of chips and systems. Agilent Technologies’ N4903A high-performance serial BERT (bit-error-ratio tester) provides complete jitter-tolerance testing for the smartest characterization of gigabit-per second serial devices.
The N4903A offers complete, built-in and calibrated jitter composition measurement for stressed-eye testing of receivers to 12.5Gbps. Automated and compliant jitter-tolerance testing allows quick and accurate characterization for all popular serial-bus standards.
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TEST AND MEASUREMENT (BROAD APPLICATION) WaveExpert near-real-time digital oscilloscope, LeCroy
Engineers who characterize semiconductor devices, high-speed clocks, and other electronic and optical devices that produce high frequency signals and fast serial data streams have for many years used sampling oscilloscopes. They do so, in part, because real-time scopes, though they have other advantages over sampling scopes, lack the bandwidth to make accurate measurements on ultrafast signals. Sampling scopes have their own problems, though, and those problems make them much less user-friendly than real-time scopes. To combine the best features of both instrument classes, LeCroy has created a new category—NROs (near real-time oscilloscopes), which combine sampling scopes’ high-bandwidth measurement capability with real-time scopes’ long memory and throughput speed.
The WaveExpert NRO’s CIS (coherent interleaved sampling) changes the way sampling occurs. CIS employs a data-acquisition technique that uses a phase-locked sampling strobe that is referenced to a user-supplied or recovered clock. This feature allows the WaveExpert, at 10M samples/sec, to acquire data at least 50-times as fast as the fastest sequential-sampling scope. The WaveExpert can also acquire a minimum of 1000 times as many data points.
