Challenges and applicative solutions for nIPOL converters in intermediate bus architecture
( 01 Aug 2006 )
by Salvatore Galati and Massimiliano Merisio, STMicroelectronics
In the distributed power market segments of high-end computing, complex networking and industrial systems, the new intermediate bus architecture (IBA) is imposing itself over the already mature distributed power architecture (DPA).
DPA In the DPA architecture, a first stage of voltage conversion from the ac line is present and generates a dc bus voltage (typ. 48V). This bus is distributed along the system and all the required output voltages are obtained through the isolated conversion from it (Figure 1).
IBA In the IBA architecture, after the first stage of voltage conversion from the ac line, a second isolated voltage conversion is realized in each board (e.g. in each card of a networking system). The output of this second conversion results in the so-called, intermediate bus. Non isolated point-of-load (nIPOLs) powered from this bus provide the required output voltages. Due to this additional conversion stage, the IBA is also referred to as 2-level DPA (Figure 2).
IBA architecture is to be preferred to DPA architecture for those applications requiring several regulated voltages within the same board. The advantage of the new architecture is due to the rapidly decreasing cost of non-isolated, POL dc/dc converters, as well as their continuing improvements in power conversion density. Besides, an IBA design results in: better control of every point of load, faster transient response and higher flexibility (leading to a shorter time to market).
However, the variety of application conditions poses serious challenges to multIPle nIPOLs used in IBA. The design of these voltage converters has to face many demanding issues: • management of extreme duty cycles; • guarantee active overcurrent protection; • management of very low dead times; • start-up sequence flexibility; • pre-biased start-up capability; • synchronization of multIPle nIPOLs; • faults management and monitoring flexibility.
MANAGEMENT OF EXTREME DUTY CYCLES Converter switching frequency is always increasing; this, together with the wide input and output voltage range, results in very short conduction times for the power elements. Plus, a high noise is generated immediately after the switching transitions. It is difficult to accurately sense the current flowing in the power MOSFETs in a very short time, discouraging the current mode architecture which requires such a precise sensing for the loop control. The voltage mode control is a good solution to overcome this issue.
OVERCURRENT PROTECTION Even considering a voltage mode control, a medium accuracy sensing of the current in the power MOSFETs is usually necessary for the overcurrent protection capability. The state-of-the-art is to sense the current in the high-side and low-side power MOSFETs not immediately after a state transition, but after a masking time; in this way, the sense circuit is shielded from the particularly high noise immediately following the commutation.
If switching frequency is high and duty cycle is particularly low, or particularly high, it happens that the masking time is longer than, respectively, the high-side power MOSFET conduction time (on time) or the low-side power MOSFET conduction time (off time) (Figure 3).
The controller, in this case, misses the current sensing in either the on time or the off time. However, only one of these conduction times can be very short and so, only one of these two measures can be lost. That is why the overcurrent protection is based on the current sensing of both high-side and low-side power MOSFETs. At least one protection is always available: the so-called peak-current protection (when current is sensed during on time) or the so-called valley-current protection (when current is sensed during off-time). That gives the maximum possible robustness and flexibility to this mandatory feature.
MANAGEMENT OF VERY LOW DEAD-TIMES In switching-converters, there must necessarily be a period when both high-side and low-side power MOSFETs are off, in order to protect the system from the risk of crossconduction. Since during dead-time the current flows in the body diode of the low-side power MOSFET, the dead-time should be as short as possible. This avoids a decrease in efficiency, as well as thermal overstress on power MOSFETs, keeping however a high degree of safety.
In standard dead-time control solutions, the shortest safe dead-time depends on the power MOSFET type used in the particular application. Recently, anticipative dead-time control techniques allow the minimum possible dead-time to be reached in nearly all common applicative conditions, keeping it in the order of tens of nanoseconds, no matter the kind of Power MOSFET used. They consist in starting with a significantly long dead-time (to avoid any risk of cross-conduction), then checking the low-side body diode recirculation time and reducing it cycle by cycle down to a minimum value.
START-UP SEQUENCING As stated above, typical of an IBA architecture design is the presence of many regulated voltages within a board. There often is some constraint about their starting-up sequence. In particular, there are three known ways in which a group of voltages can start-up: they are called sequential, simultaneous and ratiometric (Figure 4).
• Sequential start-up consists in powering-up the first voltage, then, when its final value is reached, starting-up the following, and so on. This can easily be done with dc/dc controllers having a signal (usually called Pgood), which rises when the desired output value is reached. The Pgood signal is used to enable converters in cascade.
• Simultaneous start-up is performed starting-up all converters at the same time, with the same output dv/dt; in this way the lower desired voltage will be reached first, and the highest desired voltage will be the last one to be reached. This start can be achieved by controlling the duty cycle of the converters during start-up. A voltage mode approach is again the natural choice to simplify this control.
• Ratiometric start-up is performed starting-up all converters at the same time and having them reach the desired voltage value at the same time (each output dv/dt is directly proportional to its final voltage value). This sequencing option can be achieved by controlling the reference voltage (internal or external) of the converters.
PRE-BIASED START-UP CAPABILITY Today, dc/dc controller manufacturers offer designers the possibility to manage the start-up in case of the power supply prebiased output capacitor. In these cases, usually the output capacitor must not be discharged, but instead its voltage value must rise with a completely monotonic behavior, from the given starting value to the desired final value.
In order to manage the pre-bias start-up, the possibility of the converter to sink current from the output to ground is inhibited during the start-up phase. However the real challenge is to enable the sink capability at the end of this period without generating glitches at the output [1].
SYNCHRONIZATION OF MULTIPLE NIPOLS When multiple converters are running on the same board, there is a risk of beating noise at a frequency that is the difference of the switching frequencies of the single converters. In addition, in IBA architectures, the same low voltage bus feeds several converters and this implies the need for a generous capacitive filter after it. That impacts on the cost of the overall solution.
Today, many nIPOL controller ICs are equipped with a feature that helps to overcome the above stated two criticities: the possibility of synchronizing the converters at the same frequency, and with a phase shift. Working at the same frequency eliminates the possibility of a beating frequency appearance; a proper phase shift minimizes the RMS current of the capacitive filter between the intermediate bus and the converters, and so helps reduce its dimensions [2].
FAULTS MANAGEMENT AND MONITORING FLEXIBILITY Another feature that nIPOL converter ICs are requested of is to easily face the management of many working parameters required by converters. The most common of these are: an UVLO (undervoltage lock-out) threshold, which stops the device from working should the input supply voltage be below a desired value, and a definition of what to do in case of output over/under voltage or output overcurrent (latched or non latched approach, hiccup, etc), etc. In order to program this data on the board, a typical solution of today’s ICs is to have one (or more) multifunction pins to which transmit all needed parameter values through an appropriate voltage. The choice between this approach and the programmability by digital protocols (I2C bus, PMBUS, etc.), depends on the amount and complexity of the parameters.
Today, many power supply systems are designed in IBA architecture, particularly in highend computing and in the networking segments. The success of nIPOL converters ICs for IBA architecture of the last two years is the best proof that today these products are produced with a high degree of reliability and fit the market requirements and cost constraints.
In the near future, thanks to the push for more extreme technologies and advanced design solutions, IC controllers will allow nIPOLs satisfy even stricter demands.
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