Lattice Semiconductor Corporation announced the immediate availability of its ispLEVER 6.1 programmable logic design tool suite. Version 6.1 adds new design resources and productivity enhancement tools for designers, including the HDL Explorer tool that helps manage and analyze large FPGA designs. The ispLEVER 6.1 release supports Lattice's latest FPGAs, including the new LatticeECP2M FPGA family, the new LatticeMico32 System for 32-bit microprocessor design and enhanced third-party synthesis and simulation tools. Combined with numerous other improvements, the ispLEVER 6.1 tool suite is a programmable logic design solution.
Stan Kopec, corporate vice president of marketing, Lattice, said, "We are excited to deliver this new tool suite in support of our revolutionary Lattice ECP2M low cost FPGA family with best-in-class memory and SERDES capability. Coupled with our new 32-bit open source LatticeMico32 microprocessor and the new PCI Express hard IP solution in our LatticeSC family, it's easy to see why Lattice has 'More of the Best' FPGA solutions that are winning over new customers."
Chris Fanning, corporate vice president of software and IP solutions, stated, "The ispLEVER 6.1 tool suite extends its industry-leading timing closure capability and delivers productivity enhancements such as HDL Explorer that enable FPGA designers to complete their designs in an easy-to-use and efficient manner."
Lattice works closely with its partners Synplicity and Mentor Graphics to provide best-in-class synthesis and simulation solutions as standard features in the ispLEVER design flow. The ispLEVER 6.1 release includes the latest updates to Synplify for Lattice 8.6.2b from Synplicity and Precision RTL 2006a.376 from Mentor Graphics. An update to the ModelSim 6.2C release also is included.
Simon Bloch, general manager, Mentor Graphics Design Creation and Synthesis Division, explained, "We are very excited about the capabilities of the new LatticeECP2M and LatticeSC families, and what they mean for our mutual customers. With Precision Synthesis and the ModelSim Simulator, Mentor Graphics is the only EDA supplier supporting the full FPGA design flow. We believe that when combined with the Lattice ispLEVER 6.1 software, it creates a powerful design solution for engineers trying to solve today's problems."
Lattice Semiconductor
