Integrating compensation components with a powersupply controller and buck regulator's power switches can minimize pc-board area, improve reliability, and eliminate assembly errors by reducing the number of components and solder joints. However, integration also limits a designer's range of choices in the selection of output-filter components. Figure 1a presents a typical switching regulator based on Texas Instruments' TPS5430. The boxed area in Figure 1b shows a simplified version of the IC's internal small-signal-equivalent circuit, which includes an error amplifier, E1; passive-compensation components; and a voltagecontrolled voltage-source, E2, which represents the modulator and the power switches. Support components external to the IC include output-filter components and their parasitic resistances, a resistor representing an external load, and a divider comprising R1 and R2 that sets the output voltage. The compensation-circuit design accommodates a certain range of output-filter inductance and capacitance and their associated parasitics.
Figure 2 shows Bode diagrams for the error-amplifier and modulator-gain blocks (2a) and the entire regulator system (2b).
Envisioning that end users would specify aluminum electrolytic capacitors for the output-filter circuit, the IC's designer includes a Type 3 compensation circuit to optimize the IC's performance for aluminum capacitors' characteristics.
Note that a Type 3 compensation circuit includes a pole at the origin of the circuit's pole-zero plot to provide high gain at dc and an integratorlike highfrequency roll-off augmented with pairs of poles and zeros to provide phase and gain margins at certain frequencies (Reference 1).
The regulator's LC-output modulator/filter's amplituderesponse curve peaks at the resonant frequency set by the filter's inductor and output capacitor, and then it decreases at a –40dB/decade rate until it reaches a zero at a frequency set by the output capacitor and its ESR (equivalent series resistance). Beyond that frequency, the output inductor's and the capacitor's ESRs determine the attenuation curve's slope, resulting in a –20dB/decade rate.
For good regulation, the error amplifier provides a high dc gain at low frequencies.
However, to ensure stability, the loop gain must decrease as frequency increases. The goal is to approximate a –20dB/decade rolloff at all frequencies. Placing two zeros at the output filter's resonant frequency helps cancel the two poles representing the resonance. Adding a pole to the error-amplifier response cancels the zero that the output capacitor and its ESR introduce. Adding a final pole above the power supply's crossover frequency helps further increase the regulator loop's stability. Figure 2b shows the sum of the gains of the error amplifier and modulator/filter gain. The power supply's characteristics show a 30kHz bandwidth and a 60° phase margin that ensures stable operation.
CIRCUIT BEHAVIOR The power-supply-control-loop response (Figure 3) illustrates the circuit's behavior when the design includes ceramic-dielectric outputfilter capacitors and the same integrated-compensation components in Figure 1. Ceramic capacitors present a much lower ESR than do aluminum electrolytic capacitors, and their capacitance determines the filter's attenuation rather than their ESR. Consequently, at high frequencies, the LC filter's characteristics include a double pole and a steeper, -40dB/decade slope. In addition, filter attenuation increases at the desired crossover frequency, degrading phase and gain margins. Figure 3b indicates that the power supply is unstable and, with no phase margin, will likely oscillate.
Replacing the divider network, R1 and R2 in Figure 1 with the passive network in Figure 4 stabilizes the regulation loop and allows an internally compensated controller to use ceramic output capacitors.
The network's components add two sets of poles and zeros to the compensation network to cancel the consequences of using ceramic output capacitors. For example, C2 and R3 provide attenuation that reduces the crossover frequency. You select C2 to provide attenuation at frequencies much lower than the crossover frequency.
Unfortunately, C2 adds a negative-phase shift that R3 returns to nearly zero at the design's crossover frequency. Adding C1 introduces a phase lead that compensates for the ceramic capacitors' negative effects. Without C1, the filter's 180° phase shift would reduce the regulator's phase margin to nearly zero.
The phase angle starts increasing at a frequency that C1 and R1 determine, and they introduce a zero in the phase-plane plot at that frequency (Figure 5). At a frequency that C1 and R3 determine, a pole in the phaseplane plot terminates the phase angle's increase. The geometric mean of the pole and zero frequencies determines the maximum phase-angle boost.
LOW FREQUENCY As a starting point, you can place the first pole, which C2 and the parallel combination of R1 and R2 determine, at a low frequency, such as 100Hz.
Next, adjust the values of C2 and R3 to set the first zero's frequency at 1kHz, which is much less than the gain curve's 0dB crossover frequency. Finally, set the zero that C1 and R1 introduce to a frequency that's at least a factor of two below the zero-gain crossover frequency to ensure a 45° phase margin at the crossover frequency. The Bode plot in Figure 5 features a 30kHz regulation-loop bandwidth that provides good transient response and more than 45° of phase margin to ensure good stability.
Reference
1. "Optimal Feedback Amplifier Design For Control Systems," Venable Industries, www.venable. biz/tp-03.pdf.
