CEVA Inc., the licensor of digital signal processor (DSP) cores, launched CEVA-X1641, the newest addition to the family of CEVA-X DSP cores and fully compliant with the CEVA-X Instruction Set Architecture (ISA).
The new CEVA-X1641 is designed to run highly computational intensive tasks that require substantial data throughput and high memory bandwidth. The core is fully synthesizable with enhanced memory architecture. This provides customers with the flexibility to configure the optimal memory size and structure for their specific application such as WiMAX, WiBro, 3G Long Term Evolution (LTE), or advanced multimedia standards, including the evolving H.264 compression standard and VC1 main profile. In defining the CEVA-X1641, CEVA worked closely with a lead customer that chose to utilize the CEVA-X-1641 for its WiMAX product line.
Gideon Wertheizer, CEO of CEVA, said, "The CEVA-X1641 DSP core is in line with our strategy to offer platforms that will support the growing need for performance and power-efficient DSPs for emerging wireless and multimedia standards. Our new, high-performance and fully synthesizable CEVA-X1641 DSP core will enable customers to expedite their market and reduce development costs by using the same platform across multiple, differentiated products."
CEVA
