This white paper explains how automated flow takes designs from RTL to Tapeout in 2 days and 2 hours, irrespective of the size of the chips. Talus allows the physical implementation portion of the design to commence earlier in the flow, yet it requires only one or two physical implementation engineers per design, which means that overall cost of the design can be reduced by 30percent to 50percent and the remaining physical design engineering resources can be deployed to other projects.
