The foundation of all PMBus applications, including LTC Power System Management (PSM), is the ability for the PMBus master (system host) to communicate with all PMBus slaves (PSM controllers, PSM managers, PSM μModules and PMBus monolithic devices) on the bus. Every slave on the bus must have a unique address that does not conflict with other devices.

The bus master must also be able to communicate with PSM slaves in situations like address discovery, global actions, multiphase rails, invalid NVM and bus MUXes.

PMBus is a serial communication standard that is an extension of SMBus, which is similar to I²C. Two open-drain wires, SCL and SDA, support a bidirectional communication bus with masters and slaves. Masters are devices that control communication and are typically a microcontroller or FPGA. Slaves are devices that the master controls, and they are typically a small integrated circuit, in our case a power supply manager like LTC2977 or a power supply controller like LTC3880.

A system can have more than one master, but it is rare in practice. Usually there are multiple slaves. A master directs communication to a single slave at a time by using an address, even in a system with one slave. This means every slave must have a unique address for proper system function.

LTC Power System Management devices use an EEPROM along with resistors on pins to set the unique address of each device (slave). Therefore, part of addressing is ensuring that if any EPROMs do not have valid data, a master can repair the system to the state where each device (slave) has its unique address.

Device addressing is achieved with a combination of base registers plus external address select (ASEL) pins, as well as special global, rail, ARA and other special addresses. Once you have an understanding of how to implement LTC PSM addressing, you will be able to design reliable systems quickly.

Learn more: Download the full application note