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Safety-critical requirements in the automotive market constitute a line drawn in the sand, separating incumbents from newbies in the automotive chip market.

Auto-industry veterans have pumped major resources into pioneering the development of ASIL D-certified MCUs.

Ian Riches, director of Global Automotive Practice at Strategy Analytics, said, “The main auto vendors moved into ASIL D-certified devices well before 2015. For example, Freescale (as it then was) claimed a ‘first’ back in 2012” with its MPC5643L 32-bit MCU built on Power Architecture. Other examples include STMicroelectronics’ SPC5 MCU (based on Power Architecture), Texas Instruments’ Hercules TMS570 (ARM Cortex-R-based MCUs), Infineon’s Aurix (based on 32-bit multicore TriCore), and Renesas’ RH850/P1x series of 32-bit MCUs.

As Riches explained, “If you wanted an ASIL D processor back then, ARM was not really an option. The traditional auto vendors have invested significant sums in their proprietary architectures, and so it was logical at the time to invest in them.”

ASIL D is demanded “where highly safe functions are required in the actuation area (braking/steering) for safety ECUs. These components are mostly MCUs [but not SoCs],” noted Luca De Ambroggi, principal analyst, Automotive Electronics at IHS Markit.

Road to ASIL D

When Nvidia’s CEO, Jen-Hsun Huang, stood on a stage at the Consumer Electronics Show earlier this year, he showed off the company’s Xavier chip—billed as an AI processor for autonomous cars. He said that the new SoC, scheduled for launch later this year is ASIL C-certified, while its module will become ASIL D.

The market is enamoured of a host of new “brain chips” for autonomous cars currently in development.

“Although there is a huge amount of interest—or hype—in Nvidia/Intel/Qualcomm,” Strategy Analytics’ Riches stressed, “there is still a role for ‘traditional’ vendors and architectures in designing the solutions required for highly automated vehicles.”

That’s where the incumbents’ safety-critical MCUs come in.

The case in point is Infineon’s TriCore-based Aurix MCU, which is inside Nvidia’s module. “The presence of the TriCore is an important part of the [Nvidia’s] solution to make the whole module design get the ASIL D rating,” Riches explained.

While companies making a big push for the “brain” of the autonomous vehicle often promote chips and architectures not currently used in ADAS, traditional automotive chip vendors, too, are moving ahead with autonomous vehicle SoCs. “The likes of NXP (Bluebox) and Renesas (R-Car) are seeking to leverage existing automotive devices,” observed Riches.

Let’s take a look at the case of NXP.

NXP today has both Power Architecture (lockstep architectures, which achieve ASIL D) and ARM-based SoCs. As for the latter, in current products, NXP told EE Times, “We have ASIL B-capable ARM cores” with a plan in the future to have ASIL D-capable ARM cores using lockstep architecture.

NXP S32V234 block (cr) Figure 1: NXP's S32V234 for ADAS (Source: NXP)

It’s been almost five years since NXP launched its first ASIL D-certified general market SoC—MPC5643L. As an NXP spokesman stressed, the road to ASIL D “is not a trivial activity.”

NXP worked with an independent certification body (Exida in Switzerland) to assess its MPC5643L based on a Power Architecture lockstep product. Exida’s study “lasted more than one year and required intense cooperation,” according to NXP.

Along the way, NXP said that it developed the “NXP ‘Safe Assure’ process to help our customers achieve safety certification for their systems.” In this way, NXP says that it has demonstrated that “its development process, silicon product, software products, and supporting documentation are all developed to meet the target ISO26262 ASIL, thereby reducing certification effort at the system level.”

Since then, NXP has updated its standard automotive development protocols to comply with ISO 26262 requirements, including independent safety assessments in-house.

 
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