3 Steps for Overcoming PCB EMI Issues

Article By : Martin Rowe

EMI consultant Kenneth Wyatt has written a three-part series for readers on how to design PCBs to minimize EMI. Follow these basic design steps to reduce the chances of another failure...

Have you ever designed a product only to have it fail electromagnetic interference (EMI) tests for emissions or immunity? If you have, then next time, you can follow some basic design steps to reduce the chances of another failure. EMI consultant Kenneth Wyatt has written a three-part series for EDN readers on how to design PCBs to minimize EMI.

Design PCBs for EMI, part 1: How signals move explains the physics behind how electrical signal propagate through wires. You need to understand that "Most of us were taught incorrectly how DC and AC current works in lumped or distributed (transmission line) circuits." Wyatt explains how we've also been led to believe that current flows through capacitors. Not so. Current doesn't flow through a capacitor's dielectric. Rather, a positive charge on one side of the dielectric products a negative charge on the other side. Also contrary to popular belief, electrical signal don’t travel at the speed of light.

PCB EMI P1

Figure 1: A positive charge on one side of a capacitor repels electrons from the other side, producing what we think of as current flowing through the capacitor's dielectric.

Design PCBs for EMI, part 2: Basic stack-up looks at a PCB's layers. Generally, you want power and return planes in your board, provided that cost doesn't prohibit multiple layers. When choosing the board's layers and locations, note that "currents want to return to their sources, which are referenced to the ground return plane (GRP). Referencing these signals to the power plane is very EMI-risky, because there is no clearly defined return path, except through plane-to-plane capacitance." Here, Wyatt shows you how to "stack up" a board to provide return planes and how to maximize plane-to-plane capacitance, which minimizes EMI. Wyatt also covers two-layer boards, showing how to route power, return, and signal lines that minimize EMI problems.

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Figure 2: This four-layer board stack-up provides good EMI because is places the ground reference planes inside the board.

Design PCBs for EMI, part 3: Partitioning and routing Looks at how to separate analog, motor control, RF, and digital circuits. You'll also learn how return currents flow and what happens to their associated EM fields. Signals above roughly 50 kHz follow the path of least resistance. Above 50 kHz, signals follow the path of least impedance.

PCB EMI P3

Figure 3: Keep motor control circuits near the power supply, RF circuits far away from sensitive analog signals, and digital circuits some distance away from analog circuits.

Wyatt then explains why you don’t want splits is return planes and what happens should you pass signals over those gaps. "When a high frequency trace crosses a gap in the return path, this creates a source of common mode currents, which generally couple all over the board and create the potential for radiated emissions failures."

The series wraps up with a set of EMI-minimizing guidelines and "urban legends" such as 90-degree turns on PCB traces–they're OK unless you have gigaHertz-frequency signals.

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