A closer look at TSMC’s 3-nm node and FinFlex technology

Article By : Majeed Ahmad

TSMC is on track to launch the much-awaited 3nm process node in September, and Apple will be its first 3nm chip manufacturing customer.

Taiwan Semiconductor Manufacturing Co. Ltd (TSMC) is on track to launch the much-awaited 3-nm process node in September, according to media reports in Taiwan, and Apple will be its first 3-nm customer, incorporating its TSMC-manufactured M2 Pro processor in Mac machines to be unveiled later this year. According to reports published in DigiTimes, other semiconductor suppliers committing to manufacture their chips at TSMC’s 3-nm node include AMD, Broadcom, Intel, MediaTek, Nvidia, and Qualcomm.

That shows a strong edge over Samsung Foundry, which came into the limelight earlier this year when it claimed to mass produce 3-nm processors. However, Samsung foundry’s only notable customer besides its own Exynos processors is known to be Qualcomm’s Snapdragon smartphone processor, which is competing directly with Samsung’s Exynos smartphone processor.

Moreover, unlike Samsung moving to the new gate-all-along (GAA) technology for its 3-nm node, TSMC decided to stay with the FinFET technology at the 3-nm fabrication process and instead move to GAA for its upcoming 2-nm process. The GAA fabrication technology bolsters chip performance with its high electrical conductivity.

There have also been speculations in trade media about the imminent delay in the arrival of the 3-nm fabrication process, which TSMC claimed would be ready by September 2022. There was some media chatter that TSMC’s 3-nm plans could be delayed due to Intel’s design changes in some of its upcoming processors. In the end, Taiwan’s leading semiconductor contract manufacturer was able to stick to its original plan and meet its goal of starting 3-nm production in the second half of 2022.

Figure 1 TSMC’s 3-nm process node is based on FinFlex technology, which provides chip designers the flexibility and control over their chip design in terms of boosting performance, power, or die area. Source: TSMC

The FinFlex technology

TSMC’s 3-nm process node, dubbed N3, employs the FinFlex technology, which allows chip designers to mix and match different kinds of standard cells within one block to accurately optimize performance, power consumption and area (PPA). This new feature is particularly beneficial in manufacturing complex chip designs like CPUs and GPUs featuring a lot of cores.

Compared with TSMC’s 5-nm node, commonly known as N5, the initial version of the N3 node is projected to offer a 10% to 15% performance improvement, reduce power consumption by 25% to 30%, and increase logic density by around 1.6 times. However, it’s likely to deliver a lower-than-expected yield for some chip designs. TSMC plans to release the N3E node with an improved process, which features a slightly lower transistor density but will bolster high-volume manufacturing (HVM).

Figure 2 In an N3E process, 2-1 Fin lowers power consumption and leakage, while 2-2 Fin bolsters performance. The 2-3 Fin boosts clock frequencies for greater computing demands. Source: TSMC

Eventually, TSMC will add N3P, N3S, and N3X versions to its 3-nm family of nodes. Here, it’s important to note that the Hsinchu, Taiwan-based semiconductor fab has previously offered different versions of the same node. This time, however, it’s based on the new FinFlex technology, which allows chip suppliers to customize their designs to enhance performance in different areas of a 3-nm chip. In other words, the 3-nm fabrication process will offer different variations in terms of the number of fins per transistor.

While 3-nm process technology and the original node kick off next month, these variants will come online in 2023 and 2024.

This article was originally published on EDN.

Majeed Ahmad, Editor-in-Chief of EDN and Planet Analog, has covered the electronics design industry for more than two decades.


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