When selecting an A/D converter, parametric tables can help, but for makers, understanding job is more important than sifting through pages of specs.
Ever dug deep into an A/D converter datasheet? It’s an adventure, even for folks with an analog engineering background, and it can be daunting for many makers who come from digital and software backgrounds. Parametric tables help, but for makers, understanding the job at hand is more important than sifting through pages of specs when selecting an A/D converter.
Source: Georgia Tech, via Udacity
Often on a manufacturer’s website, we see many categories of A/D converters, indicating how specialized and optimized things have become. Outside of some unique situations, I think makers are going to run into one of four basic scenarios where they need an A/D converter, so optimization helps since many of the tradeoffs are already designed into these parts.
A tried-and-true principle proven over years of microcontroller-based designs is “sleepy” behavior. When sample rates are very slow, measured in seconds or even minutes, the idea is to wake up, take a sample and perform computations and communication, and get back to sleep as quickly as possible. This behavior minimizes power and extends battery life.
In this situation, choose a converter with as few bits needed to represent the range of the incoming signal. For example, when designing a weather station, an 8-bit converter provides more than enough range to read temperatures to the nearest degree. Fewer bits mean shorter conversion times and less power used. There may be an on-chip A/D converter on an accessible microcontroller pin, saving the need for an external converter altogether.
Faster sensors, with an output data rate (ODR) up to perhaps 200 Hz, have sampling considerations. A rule-of-thumb: sample at least 2.5x faster than data is needed. Strictly speaking, Nyquist said 2x is a minimum, but add some margin. For example, if a rocket altimeter needs accurate readings every 1/10 of a second in flight, set a sample rate of 25 Hz or faster.
Here, the idea is to control the tradeoff between sample rates and bits of resolution versus power consumption. There’s the idea of effective number of bits (ENOB). In noisy environments, it may be tough to get more than 16 useful bits of resolution without using stronger filtering or oversampling, driving conversion time and power consumption in the wrong direction.
One of the areas where specialized parts come in handy is low-noise, precision sampling. These aren’t garden variety parts; steps are taken to reduce noise in every stage of the conversion, and some care needs to be taken in circuit board layout to not undo those reductions. Here, figures like signal-to-noise ratio (SNR), dynamic range—usually abbreviated as DNR—and total harmonic distortion (THD) come into play. Generally, these parts have moderate sample rates of up to perhaps 1 million samples per second (MSPS).
The realms of radar design and 5G signal processing might be beyond what most makers will encounter, but there are more common applications where faster parts fit the bill. Sample rates in the hundreds of MSPS make applications like software-defined radio (SDR) and DIY oscilloscopes possible.
Faster sampling increases the importance of low-pass filtering to strongly reject stuff above the 2x Nyquist frequency that can really mess up fast Fourier transform (FFT) analysis. It also puts a bigger demand on memory throughput and may require use of a FIFO to buffer results for analysis on a slower memory bus, and that drives system cost.
Getting the job done
Notice we didn’t compare the various A/D architectures out there—flash, pipeline, SAR, and delta-sigma. That’s interesting stuff, and if you’re really interested in how they work, there’s plenty to read about them elsewhere on Planet Analog.
But I’m going to go out on a limb here: for all but cutting-edge applications, the chip manufacturers have done most of the work in selecting and optimizing an architecture for its intended use. For instance, they are not trying to make successive approximation register (SAR) designs fit higher sample rate applications where they run into limitations; they’re optimizing SAR architectures for mid-sample rates.
For the most part, if one understands resolution and sample rates, a bit about filtering and oversampling, and in some applications how noise affects results, a maker can narrow down an A/D converter choice quickly based on the application.
Glancing at a datasheet might be informative and studying the programming model carefully, like polled operation versus free-run sampling, helps understand how to get the most out of a part. Choices may also be guided by what A/D converters are available on breakout boards through maker sites, which also makes prototyping and software development easier.
This article was originally published on Planet Analog.
After spending a decade in missile guidance systems at General Dynamics, Don Dingee became an evangelist for VMEbus and single-board computer technology at Motorola. He writes about sensors, ADCs/DACs, and signal processing for Planet Analog.