Active clamp flyback is the architecture of choice for striking the optimal balance between cost and performance in UHD power supplies.
New and emerging applications, like USB-C PD 3.0 100 W programmable power supplies (PPS), are driving demand for smaller and more compact switch mode power supply (SMPS) form factors, often referred to as ultra high density (UHD). As you can see in Figure 1, increasing switching frequency reduces transformer volume, benefiting UHD, but higher switching frequencies increase power dissipation, necessitating evolving flyback architectures.
A fixed frequency/multi-mode flyback switching at ~100 kHz drives the larger transformers seen in standard SMPS adaptors. Migrating to quasi-resonant (QR) flyback increases the switching frequency to ~280 kHz, thus reducing the transformer to a smaller RM8 form factor. Adopting active clamp flyback (ACF) gets you to ~450 kHz, enabling a lower profile RM8LP transformer. And finally, replacing silicon junction (SJ) FETs with gallium nitride (GaN) enables >600 kHz switching and even smaller transformer volumes.
Figure 1 Increasing switching frequency reduces transformer volume, but higher switching frequencies increase power dissipation. Source: ON Semiconductor
The flyback is a popular topology for low and medium power AC-DC converters, mainly because of its low cost and ease of use. The flyback assumes a DC input, and includes a transformer, a power switch (Q1), and a diode in the secondary side (Figure 2). The transformer (dots signify the primary side is 1800 out of phase from the secondary side) is a coupled inductor, where energy is transferred from primary to secondary only when the power switch is turned off.
Figure 2 The flyback topology includes a transformer, a power switch, and a diode in the secondary side. Source: ON Semiconductor
When the power switch (Q1) is turned on (Figure 3, left), current flows from Vin, causing energy to be stored in both primary side and secondary side (flux fields expanding) inductors. Current does not flow in the secondary, because the diode is reversed biased due to the 180º phase inversion.
When the power switch is turned OFF (Figure 3, right), both primary and secondary flux fields begin collapsing, the primary side polarity changes (flyback action), and now current flows in the secondary side because the diode is forward biased.
Figure 3 This diagram shows flyback operation when the power switch is on (left) and off (right). Source: ON Semiconductor
Flyback leakage inductance
Unfortunately, when the power switch (Q1) turns OFF, primary side leakage inductance (LLkg) interacts with the power switch drain-to-source capacitance Cdss, causing excessive ringing at VDS, which can damage the MOSFET (Figure 4, left). A passive, resistor capacitor diode RCD clamp, called a snubber, can be added to protect the MOSFET (Figure 4, right). The snubber moves the LLkg energy from the MOSFET drain to the snubber capacitor (CC), and dissipates as heat across RC. The snubber does not improve the overall flyback efficiency.
Figure 4 Adding an RCD snubber protects the MOSFET. Source: ON Semiconductor
Synchronous rectifier in the secondary side
Replacing the “free wheeling” diode (Figure 5, left) with a MOSFET (Q2 in Figure 5, right) improves the secondary side efficiency. The RDSON of a MOSFET dissipates much less power than a silicon diode (0.6V forward bias) or even a Schottky (0.3V) diode.
Figure 5 Adding an SR MOSFET in the secondary side improves efficiency. Source: ON Semiconductor
Valley switching and the quasi-resonant flyback
After the secondary side current (ISEC) has reached zero, or discontinuous mode (DCM), the Q1 power switch VDS can exhibit oscillations due to a resonance between the magnetizing inductance and the switch node capacitance (Figure 6). These oscillations form valleys. The QR switch seeks the lowest valley point for the next power switch turn on. Simply put, turning Q1 on during peaks increases power dissipation and turning Q1 on during the valleys decreases power dissipation.
Figure 6 The power switch can exhibit valley switching oscillations. Source: ON Semiconductor
Active clamp flyback
Replacing the clamp diode (Figure 7, left) with a MOSFET (Q3) improves efficiency (Figure 7, right), as well as protecting the power switch (Q1).
Figure 7 The ACF architecture improves power supply efficiency. Source: ON Semiconductor
The ACF architecture can recycle leakage inductance back to the load. Referencing the relative timing diagram of Figure 8, the power switch (Q1) turns on at T0 and off at T2. At T2, the leakage inductance (ICLAMP) begins to flow through the active clamp (Q3) body diode, charging the clamp capacitor (VCLAMP). At T4, Q3 turns on, continuing VCLAMP charging. At T5, ICLAMP goes negative, and now VCLAMP discharges the leakage inductance back to the load, through Q3, until T7.
Figure 8 ACF leakage inductance recycle is shown in this relative timing diagram. Source: ON Semiconductor
From T9 to T10, the active clamp (Q3) stabilizes VDS at 0V for the next Q1 ON time, referred to as zero voltage switching (ZVS). If at ZVS, the FET capacitance is zero. Therefore, turn on switching loss is zero, yielding higher efficiency. This is a form of soft switching, which also benefits EMI.
There are a couple of drawbacks to the ACF. Referring back to Figure 8 relative timing, from T5 through T7, as ICLAMP goes negative, the flux density increases, resulting in a slightly higher active clamp core loss vs. the RCD snubber of Figure 4. Another drawback is ICLAMP flows into the transformer primary winding during the Q1 off time; this increases the primary winding loss.
The NCP1568 from ON Semiconductor is a highly-integrated AC-DC pulse width modulation (PWM) controller designed to implement an ACF topology (Figure 9), which enables ZVS for high efficiency, high frequency, and high power density applications. Discontinuous conduction mode (DCM) operation allows for high efficiency in light load conditions with standby power < 30 mW.
The NCP1568 LDRV output is capable of directly driving most super junction (SJ) MOSFETS on the market with no external components needed. The ADRV driver is a 5V logic level driver used for sending drive signals to a high voltage driver, like the NCP51530. The high voltage driver should have small delays and be suitable for operation up to 400 kHz.
Figure 9 The NCP1568 ACF drives the super junction MOSFET Q1. Source: ON Semiconductor
[Continue reading on EDN US: ACF driving GaN]
This article was originally published on EDN.
Bob Card is the marketing manager responsible for ON Semiconductor’s Advanced Solutions Group (ASG) in America.