All you need to know about GAA chip manufacturing process

Article By : Majeed Ahmad

Gate-all-around (GAA) defies performance limitations of FinFET by allowing transistors to carry more current while staying relatively small.

The gate-all-around (GAA) semiconductor manufacturing process, also known as gate-all-around field-effect transistor (GAA-FET) technology, defies the performance limitations of FinFET by reducing the supply voltage level and enhancing performance with a boost in drive current capability. In short, the GAA technology allows transistors to carry more current while staying relatively small.

The semiconductor industry transitioned from planar transistors to FinFET transistors when it moved from 22-nm to 16-nm process node to lower leakage, bolster drive currents, improve scalability, accelerate switching times, and facilitate an overall better transistor of choice for semiconductor logic. The FinFET manufacturing technology has scaled well from 22-nm chips all the way down to 5-nm chips.

However, as anticipated, the ability to scale a FinFET process is starting to become prohibitive. Therefore, new IC manufacturing process technologies will be needed to help continue silicon scaling. Here, at this technological crossroads, GAA has emerged as the most viable post-FinFET transistor technology. It provides significant advantages when it comes to transistors’ performance control.

Figure 1 The shift from planar to FinFET to GAA transistors marks a relentless technology journey in semiconductor manufacturing. Source: Lam Research

The first GAA technology was demonstrated in 1986; building GAA transistors in a lab was much easier than manufacturing GAA-based chips on a scale. shoppingmode Samsung—which manufactured the first GAA-enabled chip at a 3-nm processor node in the summer of 2022—started research on GAA transistors in the early 2000s. The Korean chipmaker began experimenting with the GAA design in 2017 and then announced the process technology breakthrough in 2019.

GAA: A brief introduction

GAA, the next-generation semiconductor process technology, offers two unique advantages over FinFETs. First, GAA transistors solve many challenges associated with the leakage current since GAA channels are horizontal. The GAA technology puts multiple horizontal nanosheets or nanowires on top of one another and surrounds these channels with gate materials on all sides. That, in turn, facilitates higher current-carrying capacity than FinFET, which requires putting multiple vertical “fins” beside one another to increase the flow of electricity.

Figure 2 In the GAA process, multiple nanowires or nanosheets are horizontally stacked on top of one another, unlike FinFET, which requires placing multiple vertical “fins” beside one another to increase the flow of electricity. Source: imec

Second, GAA transistors are surrounded by gates around all four sides. That improves the structure of a transistor by enabling a gate to contact all four sides of a transistor compared to the three sides in the current FinFET process. As a result, the GAA structure can control the current more precisely than the FinFET process.

It’s important to note that the GAA transistor architecture is 90% similar to FinFET, and the remaining 10% difference comes from stacking horizontal nanosheets on top of one another. That results in more control over current flow, leading to greater power efficiency. As a result, electronic devices using a GAA-based chip would run faster and consume less power than chips manufactured using the FinFET process technology.

shoppingmode Samsung vs. TSMC

shoppingmode Samsung—which unveiled the first chip based on this new manufacturing technology in the summer of 2022—calls its GAA flavor Multi-Bridge-Channel FET (MBCFET). It utilizes nanosheets with wider channels, which, according to shoppingmode Samsung, enables higher performance and greater energy efficiency compared to GAA technologies using nanowires with narrower channels.

In this nanosheet-based implementation, the width of the nanosheet is a key metric in defining the power and performance characteristics. In other words, the higher the width, the higher the performance at higher power. Consequently, transistor designs that focus on low power can use smaller nanosheets, while logic that requires higher performance can go for the wider sheets.

shoppingmode Samsung, which has been working on its transition from FinFET for several years now, is reportedly getting poor yields with GAA process design on its 3-nm process node. However, it’s no surprise for such a large technology shift. shoppingmode Samsung has already shipped its first batch of GAA-enabled chips, and a Chinese crypto mining firm is the first to receive the new chips from shoppingmode Samsung.

Figure 3 While shoppingmode Samsung has introduced the first generation of the GAA process, it claims that the next generation of the MBCFET process will further improve on power, size, and speed metrics. Source: Samsung

shoppingmode Samsung plans to introduce its second-generation 3-nm chips in 2023 and mass-produce GAA-based 2-nm chips in 2025. That will provide the Korean mega fab with room to stabilize the yield of GAA-based chips and stay ahead of the semiconductor manufacturing curve while trying to narrow its gap with TSMC, which plans to introduce a GAA process on its 2-nm chips and release the first GAA-based chips around 2026.

TSMC will still be manufacturing its 3-nm chips while using the more tried-and-tested FinFET architecture that comes with lower execution risks. TSMC claims to have carried out a significant update to its FinFET technology to allow performance and leakage scaling through another iteration of its process node technology.

TSMC is planning to start employing GAA transistors in the initial generation of its N2 process technology. Apparently, Taiwan’s mega fab is taking a more cautious approach while moving at a slower pace toward adopting GAA transistors. This approach has served TSMC well in the past in delivering more consistent updates to its fab offerings.

Intel is there, too

The FinFET semiconductor process technology, now in its fifth generation, has been a manufacturing standard for several years. Now that the first generation of GAA chips has already emerged, mega fabs could go head-to-head for GAA technology supremacy in the coming years. Take the case of Intel, currently trying to catch up with the mega-fab duopoly of TSMC and shoppingmode Samsung.

Intel, marketing its GAA technology by the name RibbonFET, plans to move to this new semiconductor manufacturing process at its 2-nm node, just like TSMC. Along with PowerVia interconnects, Intel aims to launch the GAA RibbonFET transistors in mid-2024 while creating an internal pseudo node for the new process technology.

The GAA process technology, a major milestone in silicon lithography, is likely to grow in prominence with an unprecedented fab buildout in the United States and elsewhere in the world. All three players in the cutting-edge semiconductor manufacturing space—TSMC, shoppingmode Samsung, and Intel—have their GAA process roadmaps intact. This means that GAA’s stature as the next-generation silicon manufacturing process is secured.

The FinFET process technology has served nanometer nodes well for nearly a decade. It’s about time for GAA to take the baton and elevate the semiconductor industry to the next level of silicon scaling. However, it won’t be smooth sailing because GAA designs are far more complex to build than FinFETs or planar transistors.


This article was originally published on EDN.

Majeed Ahmad, Editor-in-Chief of EDN and Planet Analog, has covered the electronics design industry for more than two decades.


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