Analog in 3D ICs and TSVs

Article By : Jean-Jaques (JJ) DeLisle

Here is why the steady march toward 3D ICs and through silicon vias (TSVs) is becoming a brisk jog.

The steady march toward 3D ICs, namely mixed-signal or multi-technology systems-on-chip (SoC) or systems-in-package (SiP), is becoming a brisk jog. With a mix of military and government funding, and market forces driving competitive innovation toward higher performance packaged solutions, 3D ICs are currently the step for early adopters and the next step for their competitors.

3D ICs are a logical miniaturization step from PCB technology, which is relatively inexpensive but largely limited in performance for high-density systems compared to what can be achieved on-chip, especially with a variety of newer semiconductor technologies such as class III-V semiconductors. Other concerns are that PCB systems present a noise/interference, sensitivity, and reliability liability, whereas assembling ICs in a single package or stack may mitigate some of these considerations.

Since integration of mixed-signal circuits on a PCB naturally suffers from longer interconnect and routing, it is possible to avoid this by stacking or staggering ICs in the same package. A horizontal placement SiP is a step forward in integration over PCBs, but itself does require a larger footprint than 2.5D or 3D IC technologies and has some of the similar routing challenges as PCB technology.

Hence, full 3D stacking seems to offer the best efficiency, optimal space usage, and potentially enhanced performance compared to 2D IC or PCB technologies. A full 3D semiconductor stacking approach presents a variety of considerations, one of the most significant of which is signal routing between layers—this is also true for 2.5 D ICs. For 3D ICs, one such solution is through silicon vias (TSVs), which have been a topic of research and development for around half a century.

TSV technology merits

Earlier technologies such as edge-wired packages and the use of silicon interposers (2.5D) do enhance space usage; however, TSVs allow for the smallest layout space, high signal integrity interconnect, and the most efficient interconnect between layers. Though 3D TSV devices are less flexible than other solutions when it comes to dice size, pitch, and material; they also require greater minimum vertical space per layer. Due to the increased complexity and cost of full 3D packaging technology, the commercial market has mostly been exposed to this technology through high-performance computer RAM, image sensors, and FPGAs.

However, this is actively changing as integration of analog and mixed-signal sensing technologies alongside RF, power, and digital technology is increasing, vertically speaking. This presents an interesting path for analog electronics, where traditionally analog electronics have been integrated with digital electronics in mixed-signal ICs, which are often built on process nodes that greatly favor the digital technology. With full 3D integration, it is possible to have sensor and analog electronics on substrates that favor analog performance metrics over digital or high-frequency performance metrics (see figure below).

Conceptual illustration of heterogeneous and monolithic 3D integrated system includes digital logic (blue layer, silicon technology), analog/RF (red layer, III-V technology), and sensor (green layer, III-V technology). Source: MDPI

Ironically, though under development for decades, some of the drawbacks of 3D TSV technology are akin to being new technology. Many EDA tools don’t support 3D IC development. Moreover, the processes that have 3D TSVs are also new and the equipment, process times, and yields are all less than ideal. Other constraints include power, thermal, and signal quality of circuits that pass through many layers.


This article was originally published on Planet Analog.

Jean-Jaques (JJ) DeLisle, an electrical engineering graduate (MS) from Rochester Institute of Technology, has a diverse background in analog and RF R&D, as well as technical writing/editing for design engineering publications. He writes about analog and RF for Planet Analog.


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