2022-06-23 - Synopsys Inc.

Synopsys unveils RF design flow for TSMC N6RF process

Synopsys' new RF design flow, developed with Ansys and Keysight for the TSMC N6RF process, boosts 5G SoC development productivity.

2022-06-15 - Majeed Ahmad

How EDA workloads inside the cloud reinvigorate chip design

EDA suppliers joining hands with cloud platforms mark a major shift in IC designs moving beyond enterprise-level toolset licensing models.

2022-06-13 - Daniel Hoggar

Four ways to build a CAD flow

The CAD flows for an IC design range from in-house development of custom tools to purchasing a customized tool built by an EDA company.

2022-06-07 - Mark Eslinger, Joe Hupcey III, and Nicolae Tusinschi

The pitfalls of mixing formal and simulation: Examples of the trouble

Three RTL DUT code examples illustrate the trouble that can occur when comparing the results from simulation and formal side-by-side.

2022-05-25 - Mark Eslinger, Joe Hupcey and Nicolae Tusinschi, Siemens EDA

The most common problem in functional verification

Blindly combining simulations and formal analysis can fool design engineers in believing that they have made a solid progress.

2022-05-24 - Synopsys Inc.

Synopsys and Analog Devices collaborate to accelerate power system design

Synopsys and Analog Devices are collaborating to provide model libraries for DC/DC ICs and µModule (micromodule) regulators with Synopsys’ simulation tool Saber.

2022-04-29 - Majeed Ahmad

A look at the impact of Intel’s foundry foray on EDA, IP industries

Like IC design, the EDA and IP industries are an intrinsic part of the IC manufacturing ecosystem spearheaded by semiconductor foundries.

2022-04-25 - Synopsys Inc.

Synopsys launches industry’s highest performance neural processor IP

Synopsys' new DesignWare ARC NPX6 NPU IP delivers up to 3,500 TOPS performance for automotive, consumer, and data center chip designs.

2022-04-12 - Synopsys Inc.

Samsung Foundry adopts Synopsys and Ansys co-developed solution for advanced-node, energy-efficient chips

Samsung Foundry has achieved high silicon correlation with the jointly developed solution built on Synopsys PrimeTime signoff technology and Ansys RedHawk-SC.

2022-02-14 - Dr. Ashish Darbari, Axiomise

IC design: A short primer on the formal methods-based verification

Design verification groups are using formal methods, though not consistently. Here is an insight on their practical advantages in IC design.