2021-07-14 - Kedar Patankar

Common silicon issues in analog IP integration

Even novel process enhancements are coming up short in the face of massive gate counts placed side by side with analog circuitry in SoC designs of 16nm and below.

2021-07-08 - Kedar Patankar

Chip design converges with packaging and PCB in SoC era

SoC developers must become system developers to properly integrate analog and digital IP in silicon and handle extraordinary complexity and functionality.

2021-07-01 - Micah McDaniel, Texas Instruments

Developing the first orbiting IC

Bob Cook had a knack for trouble-shooting semiconductors. Jack Kilby tapped Cook as TI's lead engineer on an early NASA project.

2021-06-18 - Deekshith Krishnegowda, Marvell Semiconductor

Avoid setup- or hold-time violations during clock domain crossing

To avoid data loss, designers need to ensure that setup- or hold-time violations don't occur during clock domain crossing.

2021-06-04 - Deepak Shankar, Anupurba Mukherjee, and Tom Jose, Mirabilis Design Inc.

FPGAs for SoC design verification

Using FPGAs to verify the SoC design is a powerful tool and is becoming a very important part of semiconductor design.

2021-04-19 - Richard Quinnell

Print active electronic components and their interconnection

Roller-based techniques and tools can now fabricate active electronic components as well as their interconnection.

2021-04-15 - Marco Ciaffi and John Min

Building security into AI SoCs at silicon level

With the rapid deployment of artificial intelligence (AI), the focus of AI system on chip (SoC) design has been on building smarter, faster and cheaper devices.

- Jae Uk Lee, Ryoung Han Kim, IMEC, and David Abercrombie, Rehab Kotb Ali, Siemens EDA

Creating and decomposing a DRC-compliant design for SAMP processes

Creating and decomposing a DRC-compliant design for self-aligned multi-patterning processes is not a trivial matter.

2021-04-12 - Benoit de Lescure

NoC technology opens up new architectural options

Functions in an SoC communicating with each other through an interconnect architecture is not so different from a network.

2021-04-06 - Iuliana Radu

2D materials promise to extend the logic chip technology roadmap

There is a worldwide interest in 2D materials, especially their promise to further extend the logic chip technology roadmap.