2022-09-09 - Brent McDonald

How parasitics create an unexpected EMI filter resonance

The EMI filter resonance can affect conducted emissions, as shown in the design example of parasitics in an EV onboard charger (OBC).

2022-08-26 - Majeed Ahmad

The truth about SMIC’s 7nm chip fabrication ordeal

Can China's top fab SMIC mass produce chips at its newly developed 7nm node? The blog attempts to answer this important but tricky question.

2022-08-24 - Majeed Ahmad

A closer look at TSMC’s 3-nm node and FinFlex technology

TSMC is on track to launch the much-awaited 3nm process node in September, and Apple will be its first 3nm chip manufacturing customer.

2022-08-16 - John Min

Optimizing PPA with RISC-V custom extensions in TWS earbuds

A look at using custom extensions in a RISC-V processor to enable power, performance and area optimized true wireless stereo earbuds SoC design.

2022-07-29 - Tim Schneider

Getting started in structured assembly in complex SoC designs

Automated assembly provides a solid base in SoC designs while allowing differentiation in architectures for memory, power, and security.

2022-07-18 - Nitin Dahad

DAC 2022 panel: Democratization of chip design

Vic Kulkarni of Si2 presents his views on the democratization of chip design following the panel discussion on the subject at DAC 2022.

2022-07-15 - ESD Alliance

Electronic system design industry grew 12% YoY in Q1

The electronic system design (ESD) industry revenue increased by 12.1% YoY to $3.54 billion in Q1 2022, according to the ESD Alliance.

2022-06-20 - imec

imec demos backside power delivery with BPRs for back- and frontside routing

The novel routing scheme with decoupled power and signal wiring acts as a scaling booster for future logic technologies (2nm and beyond).

2022-05-24 - Synopsys Inc.

Synopsys and Analog Devices collaborate to accelerate power system design

Synopsys and Analog Devices are collaborating to provide model libraries for DC/DC ICs and µModule (micromodule) regulators with Synopsys’ simulation tool Saber.

2022-05-19 - Majeed Ahmad

TSMC targets conversion to 1.4-nm process node in June

TSMC plans to convert its 3-nm process R&D into a 1.4-nm process in June and thus reclaim sub-2-nm leadership from Samsung Foundry.