QuickLogic and eTopus launch flexible eFPGA chiplet template
QuickLogic and eTopus' disaggregated eFPGA-enabled chiplet template delivers design flexibility and bandwidth for high performance applications.
eFPGA IP: Raising the SoC design game
Here is how the eFPGA technology is cashing in on the SoC design movement with a matrix of new possibilities for chip designs.
RFL-class logic gates
A new class of logic gates offers robust characteristics, low power consumption, and the ability to run on a very wide range of supply voltages, output currents, and so on.
Samsung receives global carbon footprint certification for logic chips
Four of Samsung's System LSI products received product carbon footprint label certification from the Carbon Trust.
Developing the first orbiting IC
Bob Cook had a knack for trouble-shooting semiconductors. Jack Kilby tapped Cook as TI's lead engineer on an early NASA project.
AI Chip Rides Novel Networks
BrainChip released what it claims is the first hardware accelerator for spiking neural networks and is working on an ASIC that could be available within two years.